Binocular Stereo Vision Technology,as an active ranging method,is widely used in the fields of autonomous driving,virtual reality,medical imaging and so on.Due to manufacturing error,circuit noise and other reasons,binocular camera real-time acquisition of images have distortion,noise pollution and other interference,these interference will make the stereoscopic matching effect worse.In order to generate high-quality,high-real-time image pairs,this thesis optimizes and improves the image distortion correction algorithm and the median filtering algorithm after the correlation theory is studied and analyzed,and designs the binocular stereo vision image acquisition and preprocessing system based on FPGA(field Programmable Gate Array).The main research contents of this thesis are as follows:(1)When implementing the image distortion correction algorithm on FPGA,there are complex online calculation of reverse mapping coordinates and insufficient capacity of the on-chip ROM.To solve these problems,this thesis compresses the reverse mapping table,and reconstructs the reverse mapping table online by using interpolation method,and then obtains the reverse mapping coordinates by looking for the reconstructed reverse mapping table.This reduces the amount of online computation and the capacity requirements of the on-chip ROM.Simulation results show that the optimized algorithm corrects the distorted image with good effect.(2)Aiming at the problem that the traditional median filtering algorithm will cause the image sharpness to decrease,this thesis improves the phenomenon that the traditional median filtering algorithm also filters non-noise points by adding noise detection and two filtering suitable for hardware implementation.Simulation results show that the improved algorithm has better denoising effect than the traditional median filtering algorithm,and has the advantages of low complexity and been suitable for hardware implementation.(3)Based on the optimization and improvement of image distortion correction algorithm and median filtering algorithm,this thesis designs dual-channel image acquisition module,image distortion correction module and image denoising module by using Verilog HDL.Taking FPGA chip as the core of the system,the image acquisition and preprocessing system is built by using two digital CMOS image sensors,SRAM chip,USB2.0 Bridge chip and corresponding upper computerThe test results show that the designed system can realize the acquisition,distortion correction and denoising of image pairs well,and when the image resolution is 640x480,the processing speed of the system reaches 60fps,the processing delay is less than 17ms,the real-time performance is good,and it provides real-time image pairs that do not contain noise and distortion for subsequent image processing such as polar line correction and stereo matching. |