Research And Design Of Adaptive Filter Based On FPGA

When facing stochastic signal processing,adaptive filter is undoubtedly a very good solution,with the rapid development of integrated circuit and its chip industry,adaptive filter filtering performance has been greatly improved,it is widely used in interference elimination,system recognition and signal prediction and many other fields.Based on FPGA chip design Adaptive Filter also has the advantages of high flexibility,extensibility and high speed,so adaptive filter plays an important role in digital signal processing.Most of the existing adaptive filters with easy hardware implementation are to simplify the calculation process of adaptive filtering algorithm,so as to improve the filtering efficiency,but the convergence speed of these adaptive filtering systems and the steady state after convergence are not much higher than the classical adaptive filter,even in some scenarios,The steady-state nature of these improved adaptive filtering systems will be even worse.Because there is a contradiction between the convergence speed and the steady state of the adaptive filtering algorithm,a large number of scholars have made a variety of algorithm improvements on this basis,and obtained some adaptive filtering algorithms with excellent convergence speed and steady state,but these algorithms have cited a large number of complex functions to participate in the calculation process of adaptive filtering algorithm,It is very difficult to implement the hardware of these algorithms,and the resource consumption is huge.Therefore,in view of the contradiction between the complexity of the existing adaptive filter algorithm and the hardware implementation,this paper makes an in-depth analysis of the signed adaptive filtering algorithm which is easy to implement and the variable step Adaptive filtering algorithm which is more complex in the calculation process from the point of view of hardware design,and improves the combination of the two methods.A new adaptive filtering algorithm is proposed,and the simulation results show that the convergence performance of the algorithm is significantly stronger than that of the symbolic algorithm.In this paper,the new algorithm is applied to two kinds of engineering scenarios,adaptive equalizer and adaptive notch.In this paper,the appropriate algorithm parameters are determined by simulation,the hardware feasibility of the new algorithm is verified by simulation,and the adaptive filtering operation steps are simplified as reasonably as possible by using the appropriate IP kernel,so that the resource consumption of the Adaptive filter module in these two scenarios is minimized without losing the new algorithm filtering performance.In this paper,the realization of the Adaptive Filter Module FPGA of the adaptive equalizer proves the feasibility of the new algorithm and the low resource consumption.The error signal data of the module is derived and compared with MATLAB error signal data,which shows that the filtering performance after the hardware realization of the new algorithm is preserved intact.In the scenario of adaptive notch,a complete design is carried out in this paper,and a complete adaptive filtering experiment is carried out on the Development Board with spartan-6 chip as the core,and it is successfully realized,which further proves the advantages of the new algorithm and has certain reference significance in practical engineering.