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The Design And Implementation Of Digital Image Watermarking Accelerator Based On Approximate DCT

Posted on:2020-06-23Degree:MasterType:Thesis
Country:ChinaCandidate:H Q GeFull Text:PDF
GTID:2428330575952476Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
With the development of communication technology,more and more information is interacting on the Internet.How to ensure information security and maintain copyright has become a major concern of people.Digital image watermarking technology is an important method to protect digital image copyright,and is widely used in copyright protection and source authentication.In the face of increasing information interaction,cloud servers need to transmit and process more and more digital pictures.Traditional software digital image watermarking processing is difficult to achieve real-time processing,while the hardware processing has higher parallelism and faster processing speed,which is more suitable for real-time processing of digital images.In this thesis,an approximate DCT algorithm is proposed for the transplantation of digital image watermarking algorithm in hardware.By simplifying the original DCT,the operations of the algorithm are reduced,and complex multiplication operations are replaced by addition/subtraction and shift operations.Compared to the original 4×4 DCT,the approximate 4×4 DCT reduces the number of multiplications by 100%and the number of addition/subtraction by 33%.In order to reduce the influence of approximate DCT on watermark performance,a corresponding watermarking algorithm is proposed,which reduces the numerical blur caused by approximation from the numerical operation,improves the accuracy of watermark extraction and watermark robustness.Based on the above proposed algorithm,this thesis designs the overall architecture of digital image watermarking accelerator,including input data buffer module,approximate DCT module,watermarking module,approximate IDCT module and output buffer module.The accelerator is implemented on the FPGA platform.The result shows that the digital image watermarking accelerator has a working frequency of 200MHz,and achieves a throughput of 2.98GB/s with low resource consumption,while ensuring high image quality and watermark robustness.
Keywords/Search Tags:digital image watermarking, real-time processing, FPGA, approximate DCT, robust watermarking
PDF Full Text Request
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