Design Of General Signal Acquisition And Processing System Based On FPGA

With the advancement of intelligent level,the demand for signal acquisition and processing is increasing.The signal acquisition system which has single function cannot meet these requirements.The system method in this dissertation based on FPGA,which had two main functions:signal acquisition and signal processing.This dissertation solves the real-time storage problem which presented in high-speed signal acquisition system and propose the implementation of complex digital signal processing algorithms using the FPGA.This dissertation can be mainly divided into three parts.Firstly,this dissertation comprehensively introduced the status of signal acquisition and processing system around the word.Then,this dissertation researched the demand of acquisition and processing system and design of the system is completed.Moreover,the overall structure of the system was established and the whole workflow of the system was planned.All of those work was based on the principle of signal acquisition and digital signal processing.Secondly,according to the principle of electronic circuit design,this paper determined the necessary components of the system development.the selection and the design of the hardware circuit are completed by analyzing and comparing the working characteristics of the related components.The control logic programming of different peripheral chips is completed based on the Verilog language by reseraching the haracteristics of the peripheral chips.This system achieved the collaborative work among various functional modules.In order to achieve this goal,the system relied on the Platform Designer platform to build an on-chip system,using the NIOS II soft core processor to achieve overall control of the system,based on the Avalon bus principle and direct memory storage principle(DMA)to establish the system's control bus and data bus.This dissertation proposed an FPGA implementation of high-speed data storage,based on the SLC architecture of the NAND Flash chip,adapted to the real-time storage of the acquisition signal.Finally,each functional module cooperates for signal acquisition and waveform output.Finally,according to the basic principle of Hilbert-Huang transform algorithm(HHT)and the structural characteristics of FPGA devices,this paper completed the hardware design of HHT algorithm.The signal processing part was divided into an empirical mode decomposition(EMD)algorithm implementation and a Hilbert transform(HT)implementation,based on the HHT principle.The FPGA-based FFT implementation was designed with the fast Fourier transform(FFT)principle,and established the IP core.Morever taking FFT transform as the core,HT's FPGA implementation was realized.and using the three-moment algorithm solves the envelope in the EMD algorithm.Furthermore,this dissertation optimized the HHT algorithm by using the internal parallel structure of the FPGA device.By performing HHT processing on the data in the memory chip,the output waveforms of the IMF sequence and the time-frequency function sequence of the acquired signal was obtained,and the local time domain and frequency domain features of the signal was extracted and analyzed.The signal acquisition and processing system designed by this subject has been verified by signal acquisition experiments and data processing experiments.During the experiment,the system was running normally.The signal acquisition can be completed at a sampling rate of 50 MHz,and signal processing part achieved good results.