Research On Automatic Generation And Code Reuse Of UVM Testbench

With the rapid development of IC technology,the design scale and complexity of ASICs and So Cs are increasing day by day.The complexity and the difficulty of verification work is gradually increasing.There is data showing that the verification takes about 60% to 80% time of the entire design cycle process.The length of time we spent on chip verification determines the So C chips' listing date.Under these circumstances,improving verification efficiency is particularly important.There are many ways to increase verification efficiency,such as using the latest advanced EDA tools and using new verification methodologies.As a new generation of verification methodologies,the UVM(Universal Verification Methodology)verification methodology is more and more widely used in large-scale IC design and FPGA testing.With the ever-increasing design scale,code-building workloads based on UVM verification testbenchs have increased exponentially,code debugging has become difficultly,and code management of verification testbenchs has become increasingly important and complex.This article starts from shortening the time for building the verification testbench and improving the re-usability of the code at the later stage.At the same time,in order to make our research more useful,this paper takes the position of higher-level market share and more widely used AMBA architecture as So C.The object of this study is to propose a code generator that can automatically generate a UVM verification testbench or verification component for an IP core based on an AMBA interface protocol,and the generated verification component can be vertically multiplexed to later higher level verification work aiming at improving verification efficiency.Doulos' easier_uvm_code_generator is an automatic generation method based on Perl's UVM verification testbench.This code generator can quickly and efficiently builds a UVM testbench,which greatly improves the verification efficiency and ensures the consistency of UVM code design.However,before using this code generator,a large amount of configuration work is required,and users are required to provide some low-level driver code related to the protocol.Considering that the IP of AMBA interface is often used in So C system,this paper designs a large number of applications based on Doulos' easier_uvm_code_generator,combining the research objectives and significance of this paper to ensure the maturity of the newly developed code generator.In the design of the template,the reusable techniques and coding methods are integrated in all aspects,making the components highly reusable.Later,it is integrated into the code generator and the user interface of the easer_uvm_code_generator is redesigned so that the new code generator is easy to use in generating the verification environment of the AMBA interface IP.The experiments show that the redesigned code generator can greatly shorten the time to build the verification testbench,and the generated code can be reused well.The experimental results show that the code generator can greatly shorten the time to build the verification testbench.for example,taking an AHB interface slave device dut as an object,it takes only one second to automatically generate the verification testbench,but it takes at least 3900 seconds to manually write the verification testbench.Moreover,the code generated by the code generator can be reused well.This explains to a great extent that the code generator can shorten the verification period and improve the verification efficiency.