Research On Loop Vectorization In LLVM

With the development of computer achitectures,SIMD extended component gets more chans.How to use vector instructions to achieve higher performance becomes a key point for compiler developer and application developer.Compiler automatic vectorization is one of the important ways to develop SIMD performance.The product of a typical compiler has supported automatic vectorization,however,with the development of SIMD architecture and compiler optimization technology progress,the compiler automatically vectorization in the academic research and engineering technology is still hot.In this paper,based on the advanced LLVM compiler,the SIMD architecture for longer vector length is studied.Loop vectorization depends on many other pass,such as,data flow analyzing,control flow pass,loop legelity and cost modle,addtion execute loop simplify pass to get a uniform loop.In order to obtain the ILP optimization opportunity,LLVM vectorization is combined with the loop expansion strategy.Only the part instruction can be transformed to vector instructions.The rest part can only be executed by a scalar instructions.,we call this part tail loop.According to the classification of the operation of the loop to vectorize instruction,the method of mask load/store and data filling is proposed to vectorize the tail loop.Tail loop vector execution brings performance gains.While vectorizing loops,LLVM compiler cannot handle the tail loop,as well,LLVM cannot make full use of program and hardware.In this paper,we propose a tail loop vectorization method to vectorize tail loops,which can build more efficient code.The experimental results show that the code generated by the tail loop vectorization has higher performance than the original LLVM vectorization.The highest speedup on the TSVC test can reach 210%,the SPEC2006 test can also gain 5%.performance.