A CMOS Low Power Automatic Gain Control System With Large Dynamic Range

As an important part of modern communication systems,receivers is used to recover the information from the transmitted wave and convert it to electronic signals that can be demodulated by the succeeding electronic processing signal systems.Because of the complicated communication environment and other factors,the amplitude of the received signal will have a great dynamic range change.Therefore,the automatic gain control(AGC)system is required to adjust the gain of the amplifier by detecting the amplitude of the input signal in real time,providing a stable amplitude signal for the succeeding processing circuit.The main work of this paper can be summarized as follows: after studying the application and structural principles of AGC system,combining with the standard CMOS process,this paper design a complete solution for AGC system with large dynamic range and low power consumption.The details of the circuit design in this paper are as follows:(1)In the design of the gain control circuit,the input-output control relationship of the exponent law is realized by using the sub threshold characteristic of the MOS tube.In this way,the control voltage range can be significantly extended and the power consumption is reduced.Based on this gain control circuit,the variable gain amplifier(VGA)can achieve high dynamic range and low power consumption;In the design of peak detector circuit,the method of digital calibration is adopted to reduce the error between the actual detection result and the ideal result caused by factors such as temperature,process parameters and so on;On the outside of the AGC system loop,the hysteresis comparator circuit is added to demodulate the input ASK modulation signal.All of the circuit designs are simulated and verified by the Cadence ADE tool,and the layout of the entire circuit with PADS is also completed.(2)Through the multi project wafer(MPW),the entire chip design has been typed out.And then establish the test platform and design test scheme to measure the performance parameters of AGC system chip.After testing,it shows that the main performance of the AGC chip designed in this paper is as follows: the gain range of VGA is-10.6 dB to 63 dB,the setting time of control voltage is 150 ?s,the AGC system input signal power range is-60 dBm to 0 d Bm,the maximum consumption current is about 3 mA.This paper can provide engineering reference for the design of the AGC system and the test scheme of chip in the wireless communication receiver.Increase the core technology of chip design for the development of wireless communication industry in our country.