Low-illumination Video Restoration Technology Based On FPGA

With the improvement of national economy,large video acquisition devices gradually entere people's daily lives.Due to shooting scenes used widely,video images are acquired under low illuminance conditions.Low illumination image usually has the characteristics of low brightness,low contrast,detail fuzziness and high noise.It not only seriously affects people's visual perception,but also greatly limits the later image recognition and information extraction.Therefore,it is necessary to study the low illumination video image restoration algorithm based on the hardware platform to obtain recovered video image in real time.Most of the current restoration algorithms are limited to processing a single picture on the PC side,therefore a low illumination video image restoration system based on FPGA is studied and designed in this paper.The theoretical foundation of the low illumination restoration algorithm is the atmospheric scattering model and the dark channel prior.After analyzing the advantages and disadvantages of the traditional enhancement algorithms,we propose a new restoration algorithm in this paper.In the preprocessing stage,an improved Retinex algorithm using the guided filter and bright area maintenance is proposed to enhance image details with no halo.At the core stage of image restoration,this paper proposes the dark channel prior optimized in both atmospheric light value and transmittance map to restore images quickly and accurately.For denoising,a guided filter with good denoising effect and low time complexity is used to remove noise while keeping edges.Comparing with the simulation experiment of the traditional algorithm,the superiority of the proposed algorithm is verified in the subjective and objective evaluation.In the phase of hardware implementation,the proposed new algorithm is divided into layers by using modular design to simplify the difficulty of hardware implementation.Because the video stream is different from the picture,and the hardware itself is also limited,there are many difficulties in porting the software algorithm to the FPGA hardware platform.This article proposes the following optimization solutions:(1)In order to reduce resource consumption and improve the efficiency of computing division,the integer divider is converted into a look-up table and an integer multiplier;(2)Floating point operations are converted into integer arithmetic by scaling,which preserves the accuracy of calculations and widens the range of operation;(3)Aiming at the local window that is easy to acquire in the software simulation but cannot be directly obtained in the hardware implementation,it is proposed to be completed by means of the translation of serial port to parallel port,whose underlying implementation are cascaded FIFO buffers and register bank buffers.After the hardware modular design and functional simulation work is completed,a low-light video FPGA verification platform is built to observe the real-time video restoration effect,which is not only clear in details stably without frame loss and frame dropping.