Design Of Low Complexity Codec For Polar Code

As a new generation of communication systems coding scheme,polar code has the advantage of superior performance and low complexity.In recent years,scholars have carried out the research of polar code in various fields,such as confidencial communications,image transmission and so on.So polar code is very suitable for channel coding in wireless communication and it has the potential to be the standard control coding of 5th generation communication system.In this thesis,polar code was designed as channell coding in wireless multimedia communication system,according to the characteristics of polar code,considering the decoding performance and implementation of complexity.The simulation of polar coding and decoding was researched and the parameter was conformed.code is completed,and the parameters of polar code were determined,bit rate is 4Mbps and code length is 1024 bits.The decoding time and hardware implemention complexity were reduced by improving the CRC aided Successive Cancellation List argorithm,optimizing the way of decoding checkout.Consideration of hardware implementation,a half parallel encoding scheme is proposed,the code inversing operation is improved so that making a 36.3 percent reduction in the number of xor gate encoder module.The most suitable width of likely data and path data were confirmed to decrease the usage of memory.The hardware complexity was decreased by multiplex technology and increasing control circuits.After the RTL-level design of polar code circuit,the function simulation,FPGA verification and FPGA synthese of polar code circuits are finished,and the results showed that the logic function of polar codec was correct and the polar codec circuits completely meeting the 32MHz system frequency,and the design work correctly with low complexity.Finally,the bit error rate of the polar decoder circuit show that the bit error rate completely meets the system requirements.