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Design Of Traffic Shaping Circuit Module In Network Processor

Posted on:2018-04-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y LiuFull Text:PDF
GTID:2428330545461138Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid growth of network traffic and data traffic,low speed links in the network cannot meet the high-speed data stream burst,resulting in network transmission performance deegradation,eventually leading to network congestion.Traffic shaping in network processors reduces network congestion by limiting traffic bursts to improve netwoik QoS.Traditional multi-token bucket structure traffic shaping scheme can not share the excess bandwidth,resulting in low bandwidth utilization Under the study of the national nuclear high-level project "XXX Netwoik Processor",this thesis proposes a user-configurable traffic shaping scheme to increase the bandwidth utilization rate by sharing the excess traffic.The traffic shapying technology in network processor is analyzed in this thesis,including traffic classification method,traffic rate limit algorithm and queue arbitration algorithm.Secondly,the traditional traffic shaping scheme and the queue arbitration algorithm are improved,and the traffic shaping sub-module scheme is completed The traffic shaping circuit is designed by HDL,including traffic classification module,traffic rate limit module,queue arbitration module,shared token assignment module and user configuration module.Finally,this thesis implements the RTL circuit function simulation and verification,and completes FPGA verification and logic synthesis.In this thesis,a configurable shared bandwidth traffic shaping scheme is proposeed.The program improves the utilization of netwok resources by collecting the excess bandwidth and sharing it to thre burst service that needs bandwidth.Experiments show that this design can limit the traffic flow rate in tbe gigabit bandwidth enviroomment,and the average shaping error in the environment is not more than 0.19%;SMIC 65nm process library under the integrated clock frequency of 300MHz;When the total burst bandwidth is greater than 150Mbps and some services have 50Mbps excess bandwidth,the bandwidth utilization rate increased by 48.2%than the traditional multi-token bucket.The expected functional indicators and performance indicators are achieved.
Keywords/Search Tags:QoS, traffic shaping, network processor, shared bandwidth, configurable, bandwidth utilization
PDF Full Text Request
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