Design Of The Front-end Signal Readout Circuit For SDD Application

Silicon Drift Detector(SDD),as a new type of semiconductor radiation detector,has the advantages of low capacitance,low noise,fast response time,high energy resolution,etc.It has been widely used in aerospace,high energy physics experiments,medical instruments,Mineral exploration and other fields have broad application prospects.The front-end readout electronic circuit amplifies the weak signal output from the silicon drift detector and performs filtering and shaping to output a symmetrical Gaussian voltage waveform.The performance of the front-end readout electronic circuit will directly affect the energy resolution of the entire silicon drift detector radiation detection system.This requires low noise,high charge-voltage gain,high linearity,small area,etc.Among them,noise is the most critical index in the entire readout circuit.This thesis researched and designed a low-noise read-out integrated circuit for front-end signal of silicon drift detector signal.The following is the specific work:1.For the silicon drift detector and its weak output signal,a two-stage charge amplifier circuit is designed,which achieves 32×24 times accurate charge amplification in the front stage,effectively suppressing the noise of the rear stage amplifier circuit and achieving high charge-Voltage gain;a single-ended input double-ended output half-folded cascode amplifier is designed to isolate the integrating capacitor in the charge amplifier circuit from the output of the source follower,which effectively reduces the gain nonlinearity of the charge amplifier circuit.2.for the influence of silicon drift detector leakage current fluctuating with change of temperature and reverse bias voltage,a baseline stabilizer and corresponding p A level current bias circuit were designed,ensuring that when the detector leakage current fluctuate in the range of 10 p A to 1 n A,the baseline drift of the circuit output is less than 5 m V,and the baseline stable circuit will not affect the baseband signal.3.A first-order active RC low-pass filter and a Sallen-Key low-pass filter are designed to shape the output waveform into a symmetric quasi-Gaussian waveform and filter out high-frequency noise.According to the simulation results,the charge-gain voltage of the entire chip is 1.45 V / f C(1 ?s peaking time),the maximum input charge is 0.9 f C(20 ke V),and the equivalent noise charge ENC is as low as 16 e-(10 p A SDD drain Current,0.2 p F input capacitance),nonlinearity is less than 0.1%.4.The noise optimization model of the signal readout circuit of the silicon drift detector is established,and the key points of the signal readout circuit noise optimization are the design of the input parasitic capacitance,the input tube of the core operational amplifier,the feedback MOS,and the peak time;The ESD protection circuit of the chip and the subsequent test plan of the chip is proposed.