Research And Design Of Adaptive Equalizer In High Speed Serial Link

With the continuous progress of integrated circuit,the requirements for data transmission rates have greatly increased.Because of many advantages likes anti-interference,fast speed and low costs,serial transmission is mostly used in the field of industrial control,automobile,or aerospace.However,at high transmission rates,serial links can cause channel loss due to signal integrity such as channel attenuation,crosstalk,and reflection.According to the domestic and international aviation and industrial fields,FAA and EASA require the improvement of Electronic security,and industry puts many attentions in signal integrity.With the increase of signal rate,the problem of signal integrity,which was not prominent in low-speed channels,gradually appeared,and the design of equalizers to compensate for losses became more and more important.The signal integrity problem in the high-speed serial link has been analyzed.Then,the high-gain equalizer is studied,and the method of adding the cascode structure to form double zero compensation is proposed,and the design of the adaptive loop is studied.The process used in this article is TSMC 130 nm CMOS process,and a 6.25Gb/s high-speed adaptive equalizer designed for the receiver is designed.The whole circuit mainly includes three parts: equalizer,adaptive loop part and output buffer.By observing the eye diagram,it can be seen that after the 6.25Gb/s pseudo-random signal passes through the channel,the signal quality loss is very serious,and the eye diagram is almost 0,which is basically closed.After simulation of the overall cascade,the adaptive equalizer circuit designed in this paper can provide 15 d B compensation gain,jitter is less than 0.3 UI,layout area is 488?m*716?m,power consumption is 42.84 mW,It proves that the adaptive equalizer can compensate and restore the signal after,improve the signal quality at the receiver,and improve the receiving eye diagram.