The Design Of Signal Acquisition And Transmission Platform For Open Ultrasound Imaging System

Ultrasound imaging is widely used in the field of nondestructive testing due to its high flexibility,practicability and intuitive detection results.In some emerging applications of ultrasonic nondestructive testing,such as bonding quality inspection of composite,fatigue damage assessment of power insulator,etc.,the defects and aging mechanism causes of equipment and materials are different from those in existing industries.More reasonable imaging methods and defects assessments can be proposed according to the studies of the industry application characteristics as well as the analyses of acquired raw radio frequency(RF)data.Although the ultrasonic theoretical researches and commercial equipment are gradually mature in domestic,there is lack of open ultrasound imaging system which has excellent performance and can be flexibly applied in various emerging scientific research of nondestructive testing areas.Considering the problems above,this study combines the characteristics of domestic and international ultrasonic nondestructive testing equipment,the demands of scientific research and practical application,and develops the signal acquisition and transmission platform for portable 32-channel open ultrasound imaging system based on "AFE + FPGA + DSP + USB3.0" architecture.The platform can flexibly read the real-time RF data of every channel and the raw data of the key stages in the digital signal processing,and is used for the defects and aging mechanism research of equipment and materials.In this paper,the hardware of ultrasound imaging system is designed and tested,and the implementation of ultrasonic imaging algorithm in FPGA is studied.The specific work is as follows:(1)The hardware circuit design of signal acquisition and transmission platform for open ultrasound imaging system is proposed,which consists of two parts: the transmitting circuit board and the receiving circuit board.The design of schematic and PCB of ultrasonic front-end transmitting circuit,high-speed data acquisition circuit,high-precision clock circuit,FPGA core circuit and USB3.0 interface circuit and so on are accomplished.The hardware circuit of signal acquisition and transmission platform are tested,and every hardware module of the system works normally.(2)The ultrasonic echo signal processing and control programs based on FPGA and DSP are designed,including: the FPGA program of ultrasonic echo reception control,ultrasonic echo digital signal processing,USB3.0 transmission control as well as the system DSP control program.The deserialization of 32-channel 600 Mbps LVDS signal on ultrasonic receiving circuit board is accomplished.The aim that real-time RF data and the raw data of the key stages in digital signal processing can be flexibly read is achieved.The USB3.0 high-speed and stable data transmission between hardware platform and host computer is completed.The real-time USB3.0 transmission rate measured by Streamer,the official software of USB3.0 chip,is about 304 Mbyte/s.(3)The implementation of error-constrained segmented focusing method with dynamic aperture is designed in FPGA.The relevant algorithm is simulated with MATLAB software.The sound field is divided into 61 segments of focus under the error constraint of 10 ns.The obtained delay focus parameters and segmentation boundary parameters are used in the circuit design of FPGA to achieve segmented focus of ultrasonic echo signal in receiving stage.(4)The CORDIC algorithm is applied to the logarithmic compression processing in ultrasound imaging system.The implementation of the expanded hyperbolic CORDIC algorithm based on computational fusion in FPGA circuit design is proposed.The logarithmic operation is realized by the operation characteristics of the CORDIC algorithm in the hyperbolic coordinate system vector mode.In consideration of the characteristics of the expanded hyperbolic CORDIC algorithm and the ultrasound data in this system,the appropriate expanded convergence domain conditions are selected.The algorithm is simulated in MATLAB software and the error analysis of the expanded hyperbolic CORDIC algorithm is carried out.In the circuit design of FPGA,the expanded hyperbolic CORDIC algorithm fixed-point optimization method based on computational fusion is used for logarithmic compression processing,which can avoid floating point arithmetic and subsequent multiplication and division.The circuit implementation of the algorithm in FPGA is completed with pipelined architecture,and the output of FPGA is analyzed.The maximum of absolute relative error between the logarithmic compression processing result in FPGA and the theoretical value is only 0.14%,which satisfies the design requirements.