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Real-time SAR Deceptive Jamming Generation Technology Based On Muticore DSP

Posted on:2019-08-07Degree:MasterType:Thesis
Country:ChinaCandidate:K XuFull Text:PDF
GTID:2392330590467442Subject:Information and Communication Engineering
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Nowadays,foreign military airships and airborne SARs have become more and more frequent to China's military reconnaissance and pose a serious threat to the fixed / mobile targets in our border and in the sea.In the electronic warfare system,how to make the real-time echo generated by a large scene be guaranteed is the main difficulty to realize the effective interference to the SAR.However,the overhead imaging time of SAR is only a few seconds,and the area that needs to be effectively covered at a time is larger.Single-core DSP is far from meeting the huge demand for the operation rate.While multi-core DSPs achieve multiple performance gains by integrating several DSP cores,the power consumption and cost are more than halved compared to discrete single-core DSPs,which is an effective solution to the bottleneck of computing speed.First of all,this article summarizes the application of DSP in the field of military information systems and focuses on the key technologies of high performance multi-core architecture of DSP chip and the basic method of algorithm optimization.Secondly,this paper presents an advanced and reusable multi-core DSP application development framework,including the decoupling method of communication interface encapsulation and complex process splitting,and provides the third dimension of program parallelization.The resource management method using name service container is introduced,and a multi-core task scheduling system based on blocking queue,circular linked list and LUC algorithm is introduced.It realizes a multi-core / multi-board concurrent programming software architecture with low coupling,strong reusability and simple modification.Thirdly,this paper proposes and implements an advanced,efficient and reconfigurable multi-core DSP application development architecture.The framework solves the problem of parallelization and low degree of parallelism through decoupling methods such as interface encapsulation and functional unit splitting,and introduces software resources such as name service and control inversion to manage multi-core DSP programs to further solve the problem of code reuse,Program reconstruction difficult problems;based on the blocking queue,the circular list and LUC algorithm proposed multi-core task scheduling and load balancing solutions.The architecture can be applied to any multi-core DSP applications including military information systems.It is especially suitable for applications with complex functions,high performance requirements,frequent maintenance and upgrades,and can support code reuse in heterogeneous hardware environments.Then,an optimization method based on multi-core DSP for real-time generation of space-borne deception jamming signal is proposed.Aiming at the signal characteristics of SAR,a hash lookup table method and a dynamic / static calculation and separation method are used in the design of the multi-core DSP algorithm to improve the execution efficiency of the algorithm.For the high-performance multi-core DSP chip architecture,the key issues such as software pipeline,code offset,low cache hit rate and other computational efficiency are solved by optimizing the execution order of DSP instruction,parallel logic optimization of DSP instruction and data coding.Nuclear echo generation efficiency increased nearly 30 times,for real-time generation of SAR spoofed interference provides a technical means.Finally,based on the concurrent architecture and SAR deception jamming real-time generation algorithm,the DSP software in practical engineering is designed and the function design,process design and multi-board / multi-core scheduling mechanism are analyzed in detail.The effectiveness of the proposed method is verified by the in-field experiments.
Keywords/Search Tags:space-borne synthetic aperture radar, deceptive jamming, muticore DSP, muticore core/board software architecture
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