Design And Implementation Of Satellite Information Transceiver System Based On FPGA

The microsatellite integrated electronic platform is the core module of the satellite,which not only guarantees the most basic function of the satellite,but also takes into account the information transmission and sharing between the modules.As the front-end transceiver device of the integrated electronic platform,the star information transceiver system mainly realizes the receiving and transmitting of the uplink remote control data and the downlink telemetry data,wherein the remote control data is sent by the ground station,and the telemetry data comes from other modules of the integrated electronic platform such as the attitude control,Thermal control,safety management,satellite navigation,etc.The current star information transceiver system usually adopts an integrated design,that is,a fully customized circuit structure,a data signal processing module and a radio frequency module are integrated.This design leads to system upgrade and function expansion,which may require frequent hardware replacement for support,and has been increased.R&D and maintenance costs,and traditional designs require a large number of different types of complex devices such as filters,mixers,etc.for different satellite communication scenarios,and the task is heavy.In this paper,for the problems in the traditional design,the ML605 development platform of Xilinx is used for the baseband signal processing in the design scheme.The advantages of FPGA programming can be used to solve the drawbacks that the traditional transceiver upgrade and maintenance may need to replace the hardware equipment.The RF module design uses ADI.The company's AD9361 is used as the main chip to avoid the design of a large number of filters in the signal processing process.The peripheral circuits include analog signal interface,FMC interface module,clock input module,and power and power monitoring module.Finally,the overall PCB board design and fabrication of the RF module is completed.The software design of this paper includes differential codec module,QPSK modulation module,DQPSK demodulation module,and simulation verification of each module under Modelsim platform.When debugging and verifying,firstly,the relevantdescription of the RF module is performed,and it is configured according to the configuration timing.Secondly,the module is subjected to electrostatic testing and power module detection.Finally,the FPGA development board is used to functionalize the transceiver channel of the overall system verification.This paper is based on the FPGA processing platform and the RF module design hardware structure.The two are connected through the FMC interface,which can complete the processing and sending and receiving of high-speed signals,reducing the cost of post-maintenance and function expansion of the traditional satellite information transceiver system,and avoiding the cost.A huge and cumbersome filter design in digital signal processing.