| With the progress of science and the development of society,various medical imaging devices have been put into use in hospitals,which provide abundant imaging data for clinical diagnosis of patients.But most of the equipment can only provide unilateral information of the patient,and it can not be integrated into the objective condition.Therefore,it is very important to deal with and analyze various medical images.Medical image registration is an important branch of medical image processing,which can improve the accuracy and treatment level of clinical diagnosis and improve the effective utilization of medical resources.Thin Plate Spline(TPS)algorithm has high reliability,high accuracy,good smoothness and good robustness in registration of non rigid images.So it is widely used in the field of medical registration.This paper mainly studies the TPS registration algorithm for medical images on Zynq-7000.It first studies the theoretical knowledge of TPS algorithm and the detailed calculation process of the algorithm.It is familiar with the development environment of the chip,and describes the system construction,compiler environment and related instructions of Linux.This paper combines the characteristics of TPS algorithm and adopts the strategy of combining serial and parallel computing to give full play to the advantages of Zynq-7000 chip.It first designs a variety of AXI buses based on demand,calculates the relevant coefficients from the ARM inside the chip,and then transfers it to the logical layer through different AXI buses for registration calculation.The implementation of the TPS algorithm in FPGA logic is the focus of this article.In this paper,all floating point operations are quantified into fixed-point points,and then IP-CORE,called FPGA,is used to perform operations such as square root multiplication and so on.After that,it calculates the index coordinates and reads the source image data.Finally,bilinear interpolation is used to get the fixed point image data after registration.After the comparison test,the accuracy of the calculation is completely in line with the design requirements,and the actual results are basically consistent with the theoretical results.In this paper,FPGA chip is used to realize the algorithm.The algorithm is fast and can be accelerated by using internal resources in parallel.It has high accuracy and is conducive to expansion and transplantation.With its powerful data parallel processing capability,FPGA can achieve fast processing of continuous frames,which greatly improves the efficiency of the whole system.It selects 20 matching points,and the frame rate of 2D image processing on 512*512 is 381 frames per second.When the chip resources are basically used,the frame rate of 3D image processing for 512*512*200 is about 5.7 frames per second.This initially meets the practical requirements,so it has high practical application value. |