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EEG Data Compression Based On Compressed Sensing And FPGA Implementation

Posted on:2020-10-28Degree:MasterType:Thesis
Country:ChinaCandidate:Y B YeFull Text:PDF
GTID:2370330590460962Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Electroencephalogram(EEG),as the spontaneous bioelectrical activity of brain cells,contains a lot of physiological and pathological information.With the rapid development of microelectronics,biomedical,brain science and other related fields,EEG signals have been widely used in brain neuroscience,virtual reality technology,biofeedback therapeutic devices,etc.,especially in epilepsy and intracranial space-occupying lesions.It has an irreplaceable role in the clinical diagnosis of brain diseases.In practice,it is often necessary to collect EEG signals for multiple channels for a long time,which will generate a large amount of data.Due to the limitation of the bandwidth and power consumption of the transmission node,it is an important research to compress the EEG data,reduce the power consumption of the device and meet the transmission bandwidth limitation while ensuring that the main characteristics of the EEG signal are unchanged.The theory of compressed sensing proposed in recent years is suitable for front-end compression coding,which is convenient for hardware implementation.Huffman coding,as a lossless coding method,can achieve optimal coding according to the probability of occurrence of characters,and can further improve the compression ratio based on compressed sensing.On the basis of compressed sensing theory and Huffman lossless coding method,this thesis carries out EEG compression research and hardware implementation.The main work is as follows:(1)Combine compressed sensing and Huffman coding to perform data compression on the EEG database.On the reconstruction algorithm,based on the BSBL algorithm,the reconstruction errors under different sparse basis are compared to verify the effectiveness of the compression algorithm.According to the compression algorithm,the hardware implementation structure is proposed.(2)Hardware implementation of the compression algorithm.On the one hand,the compressed sensing matrix required for compressed sensing is generated by a linear feedback shift register(LFSR)to reduce storage and resource usage.On the other hand,for the statistical sorting process required by Huffman coding,a four-stage pipeline implementation is designed to reduce the coding statistics period and accelerate the encoding process.(3)Using the EEG database as a simulation sample,write testbench to simulate the design of the function.Since the compressed sensing matrix is a sparse binary matrix,the simulation results of the hardware design are consistent with the software simulation,and there is no error.(4)Synthesize the design with Xilinx's Vivado tool.The results show that the EEG signal compression module implemented in this paper has a data processing delay of about 65?s under the 150 MHz clock.When the reconstruction error is 2%,the average compression ratio can reach 68.4%,which is 18.4% higher than the compression sensing method.
Keywords/Search Tags:EEG signal, Compressed sensing, Huffman coding, FPGA
PDF Full Text Request
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