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Research On 3D On-chip Network Layout Optimization Algorithm Based On Quantum Particle Swarm Optimization

Posted on:2018-04-12Degree:MasterType:Thesis
Country:ChinaCandidate:Y J WanFull Text:PDF
GTID:2358330515499096Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of Network-on-chip and expansion of chip scale,Two-dimensional Network-on-Chip(2D NoC)has reached a bottleneck in the area?power consumption?floorplanning?packaging density and other areas,Three-dimensional Network-on-Chip(3D NoC)emerges as the times require,its performance is much better than that of the Two Dimensional Network-on-Chip in many aspects.Among them,in order to give full play to the advantages of 3D NoC space,floorplanning algorithm that how to place electronic components and modules of 3D NoC has become an important part of the design process,the floorplanning algorithm affects the chip area and the wiring length directly,at the same time can greatly influence communication delay,CPU computation time.As a result,the floorplanning algorithm on 3D NoC has become an important research direction.The simulated annealing algorithm is the most commonly used method in floorplanning problem of 3D NoC,and the improved particle swarm algorithm based on simulated annealing algorithm is often applied in floorplanning problem of 3D NoC,the above two algorithms get next feasible solution by using a disturbance method from a single solution,so the convergence speed is slow.When the network size and the complexity of the structure increases,the number of feasible floorplanning solution increases,disturbance number of the solution also increases,so that the time of getting solution greatly increases.This paper proposes a floorplanning optimization algorithm based on discrete quantum-behaved particle swarm algorithm.This algorithm has an initial population and uses its iterative evolution,and has better search ability and faster convergence speed.In order to increase the diversity of the solution,further improvements are made.Simulation results show that the discrete quantum-behaved particle swarm optimization algorithm can select floorplanning scheme which can reduce flit latency and save CPU time,it has significant effect especially in test cases which has more IP cores and high injection rate,for example in ami49 experiment with 100%of the injection rate,the average flit latency of the discrete quantum-behaved particle swarm optimization algorithm reduces 20.63%than the simulated annealing algorithm;While the average CPU time of the discrete quantum-behaved particle swarm optimization algorithm reduces 69.40%than the simulated annealing algorithm;The improved discrete quantum-behaved particle swarm optimization is suitable to slow down the evolution speed,the quality of the optimal solution is further improved,the cost of solution in the ami49 is reduced by 12.55%compared with the original discrete quantum-behaved particle swarm optimization algorithm.
Keywords/Search Tags:Three Dimensional Network-on-Chip, floorplanning algorithm, B*-tree, discrete quantum-behaved particle swarm optimization
PDF Full Text Request
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