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Research And Design Of MAC Layer Communication Chip For Wireless Sensor Networks

Posted on:2016-07-08Degree:MasterType:Thesis
Country:ChinaCandidate:Y F BaiFull Text:PDF
GTID:2358330479455542Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Wireless sensor network is a burgeoning information network that can collect data and monitor the environment. Sensors, communication nodes and the communication terminal form a self-organizing and dynamic transmission network when the wireless local network is established. The rapid development of wireless sensor network has brought convenience to people's production and life. Meanwhile the research on the exclusive chip design based on wireless sensor network has become popular due to its value and the development of the chip technology.IEEE 802.15.4 is a low-power and low-rate wireless network protocol that defines the PHY layer and MAC layer. The fully functional MAC design is proposed in this paper based on the WNS current research, ASIC chip design technology and IEEE 802.15.4 MAC protocol.The MAC communication chip designed in this paper can realize the basic function for MAC layer, and the whole chip design contains two parts which are a RISC CPU and a MAC controller that includes a CSMA-CA algorithm controller, a MAC transmission module, a MAC receiving module. The MAC controller can exchange data with the CPU, meanwhile the CSMA-CA algorithm controller can arbitrate the channel competition to allow only one node to communicate in the channel at one time. The CPU based on the RISC has simple logic and the separate design for CPU can achieve a much better function.The design in this paper has passed the Modle Sim simulation and is a low-power and fully functional design. Unlike the semi-custom chip FPGA design, the MAC communication chip has completed the whole process from the front logic simulation to the back-end physical design based on the ASIC digital chip design flow, including architecture, RTL coding, verification, synthesis and physical design. After the completion of RTL logic design, this design used the synthesis tool DC to generate a gate-level netlist to be imported into Encounter to generate the final chip layout.
Keywords/Search Tags:Wireless Sensor Network, MAC, CSMA-CA, ASIC, Encounter
PDF Full Text Request
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