Font Size: a A A

Research On Vertical Interconnect Technology Of The Phased Array Front-end

Posted on:2019-06-26Degree:MasterType:Thesis
Country:ChinaCandidate:L J WangFull Text:PDF
GTID:2348330563954471Subject:Engineering
Abstract/Summary:PDF Full Text Request
Nowadays phased array technology has become more mature.For phased array technology,lighter and smaller has become a trend that cannot be ignored.Early phased array front-ends often use phase-shifted phase shifters as delay devices and are gradually unable to meet the requirements of wide-bandwidth corner scans.First,the phase shifter can only change the phase and cannot produce true delays;secondly,the phase shifter can only satisfy the phase shift within 360°.The delay line does not have these problems and can achieve a high latency while realizing true delay.The delay line has the advantage that the phase shifter can't be compared in performance,but because its size is often too large,it is difficult to adopt in the early narrow-band phased array technology.Vertical interconnect technology is one of the effective ways to solve the problem of delay line size.Therefore,this paper attempts to analyze the vertical distribution technology and analyze the field distribution characteristics of the transition structure.Finally,a miniaturization delay line is designed to verify the feasibility of vertical interconnect technology to achieve miniaturization of the phased-array front-end circuit.In this paper,the via structure is first studied,the equivalent circuit model of the via is established,and the parameters that cause parasitic effects are analyzed for different vertical interconnect structures.The simulation of the scan parameters is performed one by one,and the performance of each structure within the specified frequency range is obtained.Simulation results.There are many factors that affect the performance of vertical transition structures,such as the radius and height of metalized vias,the pad and pad radius at the contacts,and the conductive material used.Although the three vertical transition structures have the same place in principle,due to the difference in their respective processing techniques and processes,the performance in the specified frequency band has a big difference.This paper used three commonly used vertical interconnect structures as the proposed solution: a three-wire hair button technique was used to design a "face-to-face" structure for transitions between microstrip lines;a PCB multi-layer board technique was used to design the A transitional structure between the microstrip line and the stripline;an interconnect structure for coplanar waveguide to stripline is designed using TSV technology.After comparing the performance of each structure,combined with design requirements and processing costs,the PCB multilayer board technology was finally selected to produce a four-digit NC delay line.The size of the delay line circuit that has been machined is 53mm*43mm*13mm,and miniaturization is achieved with guaranteed performance.The test results show that the delay component in the 8-12 GHz,the input and output standing wave is less than 2,the phase nonlinearity is better than 10°,and the phase error is less than 6°.Finally,the processing conditions at the vertical interconnect structure were scanned by X-ray to obtain the processing error data of the actual process.The modeling and simulation of the machining error model was performed via the HFSS.After comparing the simulation results between the error model and the ideal model,it is found that the design needs are still met.This verified that the technology meets the microwave integrated circuit design requirements in the 8-12 GHz band.
Keywords/Search Tags:phased array, vertical interconnect technology, true time delay, miniaturization
PDF Full Text Request
Related items