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Research And Implementation On MPPSK Coded Modulation And Wireless Video Transmission

Posted on:2018-10-05Degree:MasterType:Thesis
Country:ChinaCandidate:J ShaFull Text:PDF
GTID:2348330542969341Subject:Information and Communication Engineering
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With the rapid development of communication technology and mobile Internet,along with the popularity of intelligent devices,human society has been in a high-speed development of information society.In various business provided by wireless networks,the video has become the most important carrier.Wireless video transmission includes two key technologies:source coding and wireless transmission.Compression mainly studies how to maximally compress video redundancy and reduce the amount of data transmitted.Wireless transmission mainly studies how to improve the wireless transmission rate and its error control during the transmission process.In order to achieve high-speed transmission of multimedia data,the bandwidth of modern communication system is increasing,followed by the shortage of wireless spectrum resources.Efficient modulation can transmit more information within unit frequency band,and effectively alleviate the problem of spectrum tension.Therefore,it has great significance to study the application of efficient modulation in wireless video transmission.Firstly,this thesis introduces the video compression theory and H.264/AVC coding standard.Then we introduce the waveform expression of M-array Position Phase Shift Keying(MPPSK),which is the key technology of efficient modulation,and analyze the advantages of the application of MPPSK modulation in video transmission.Secondly,the thesis discusses the characteristics of H.264 encoded data stream and a data partition algorithm based on NAL is proposed,which divides the encoded data into high priority data and low priority data.Then,the unequal error protection(UEP)scheme in MPPSK video transmission system is proposed to improve the quality of the recovered video,which protects data with different importance by channel coding with different bit rate.Due to simulation using JM coding software and matlab,we find that the bit error rate of high priority data is lower than that of low priority data by an order of magnitude under the same signal to noise ratio.The overall data error rate of UEP scheme is better than that of equal error protection(EEP)scheme,and the peak signal to noise ratio is also better than that of EEP scheme under the same signal to noise ratio.Thirdly,the hardware implementation of MPPSK modulation and demodulation is introduced.Then the demodulater's core module impacting filter and demodulation algorithm based on position are analyzed emphatically.A two-window and real-time bit synchronization algorithm is proposed which is a feedback all-digital synchronization scheme,and its timing error is calculated via data aids.Then the MPPSK communication system is built by using the System Generator tool.The Verilog language is used to realize bit synchronization and data demodulation,and simulation verifies the correctness of the algorithm.The bit synchronization and demodulation module are used to generate HDL code for FPGA hardware implementation.Finally,the MPPSK image transmission system is built based on FPGA.The hardware implementation details,block diagram and pin description of image acquisition module,modulator,demodulator and display module are introduced according to the signal flow.Then functional simulation,timing simulation and hardware debugging of the system is carried out,and the system achieves the goal of transferring images at fc?70MHz with the rate of 2Mbps.The system reads image data from SD card and uses VGA interface to display the image after the process of encoding,modulation,transmission,demodulation,and decoding.Since 70 MHz is a standard intermediate frequency for satellite communications,microwave communications,and many VHF/UHF stations,the system will be able to interface directly with these communications devices.
Keywords/Search Tags:M-array Position Phase Shift Keying, wireless video transmission, unequal error protection, bit synchronization, System Generator, Xilinx FPGA
PDF Full Text Request
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