Investigation On Au-Ag Bonding For Power Chip 3D Stacked Technology

Power device is widely applied in the field of power electronics. It has been the key component of Radar, electronic instrument, automatic control equipment. SiC bipolar device with the advantage of high breakdown voltage, low on-resistance, fast switching speed, strong radiation resistance and high-temperature operation,has shown the excellent prospects in the field of power device. However, there exist a lot of difficulties in manufacturing power bipolar device nowadays. The package technology of IPM(Intelligent Power Modul) has solved the problem. Stacking multiple low-withstand voltage power chips is an alternative way to obtain the integrated high voltage power IPM. So the investigation on 3D stacked technology, as the key method of IPM, has great value in practical applications.The study done in this paper can design high-voltage power device and improve the performance of power devices. The experiment uses a domestic SiC-SBD as an example to complete investigation on 3D stacked technology of SiC bipolar power chip.Several 3D stacked schemes have been proposed based on the conventional process.Through dissecting device and theoretical analysis, the proposed 3D stacked schemes have been revised and ultimately the solution of Au bumps stack has been the final choice.Dummy chips with similar structure to Schottky Diode were adopted to perform3 D stacking using Au-Ag bonding technology. The Dummy silicon chips deposited200 nm Ti and 4?m Al as the anode electrode on one side of the silicon chip, and 300 nm Ni and 1.3 ? m Ag as the cathode electrode on the other side. Au stud bumps were fabricated by wire bonding technology. The Au bumps were formed on the Al electrode of one chip, and bonded to the Ag electrode of the other chip by thermocompression to realize 3D interconnections between stacked chips. The Au-Ag stacked structure helps to reduce interconnect distance and increase package density. Thus, the 3D stacked package for high voltage power device can achieve IPM chips. Experiments had been done to optimize the Au stud fabrication and chip to chip bonding process. Bonding strength of Au-Al and Au-Ag interfaces was measured and evaluated by shear test.Afterwards, microstructure and composition of Au-Ag bonding interface was analyzed and measured by SEM and EDX using FEI QUANTA FEG 450.