Design And Implementation Of AES On The Multicore Vector X-DSP Processor

Along with the rapid development of wireless communication technology,from the original analog communication to digital communication,as well as the wireless network,mobile communication already has a huge impact on modern society.Wireless network is an open platform,although the quick information on the network of interaction,brought a lot of convenience,while the security and privacy of information is becoming more and more attention in this field.At the same time,the ability of the chip processing,password analysis technology development,the urgent need a new data encryption standard to ensure the security of information.AES algorithm as the national institute of standards and technology(NIST)advanced encryption standard which is published in 2001,As a new encryption standard,At present,the standard has become the International Organization for standardization(International Standards Organization,ISO),the Internet Engineering Task Force(Internet Engineering Task Force,IETF)in various fields.And the Intel,AMD,TI,like this computer hardware manufacturers,as well as Microsoft,Open SSL,TrueCrypt,Crypt++ software services to provide support and recognition,which is widely used in the field of business.In this article,which is based on the independent research and development in our country,with low power consumption,programmable configurable general high-performance multi-core vector X-DSP processor,making full use of the X-DSP computing performance for large amount of data in field of data encryption,to accelerate AES encryption algorithm.for its specific architecture,through the use of X-DSP instruction set,AES algorithm to achieve high performance,the main work includes:Firstly,This article carried on a thorough study of AES algorithm research,Background of the AES,and the difference in the Rijndael algorithm;The use of the symbol,terminology,function has carried on a contract;As well as the encryption algorithm structure,including round transformation,the number of round transformation,key layout structure,and the introduction of decryption structure are discussed in detail.On the basis of deep studying of the AES algorithm and the target platform X-DSP core processor,including the multi-core architecture,a single core architecture,format of instruction set,perform packet format,as well as the contents of the processor's pipeline,etc are described.On the basis of deep understanding of AES algorithm and target platform,we analyzed the realization,mainly including round transformation and key layout analysis,and the algorithm was analyzed,and the working mode of parallelism.Through the assembly instruction design of the AES algorithm to this target platform,and effectively mapping on the X-DSP multi-core processors,and based on the X-DSP instruction set,assembly code to achieve the high performance of 128-bit AES encryption algorithms library.Finally,the assembly code of the algorithm to test,and the performance were evaluated.At the same time,analyzes the factors affecting the performance of algorithm,so that deep excavating performance to improve implementation efficiency of AES algorithm in X-DSP in the future work.