The Research Of Saliency Map Extraction Algorithm For Visual Prosthesis Based On FPGA

Vision is the most important sense organ of human, visual damage will bring the pain which is unable to imagine to the blind. Some scientists have proposed a plan to help the blind to repair the vision, electrode stimulation device in visual prosthesis is used to repair the lesions on visual pathways.The environment contains a huge amount of information in the daily life, the images applied to visual prosthesis need to be processed. Otherwise, the blind will not be able to recognize obstacles. Thus, it is necessary to extract the salient region in the image. In this paper,we introduce a saliency map extraction model-itti, which based on visual attention mechanism.The itti model is a classical model for extracting saliency map. The saliency map is the image with low resolution and this model is easier for the hardware implementation. Thus, this model is suitable for the visual prosthesis. This paper introduced an improved scheme based on the itti model into the research of visual prosthesis. The improved scheme converts the RGB color space to HSI color space and makes it more consistent with the human vision system. Also, it can reduce the complexity of algorithms. In this paper, the traditional itti algorithm and the improved one are modeled and simulated based on MATLAB software. Then, the quantitative analysis is carried out for the simulated results. The results show that the accuracy of the improved algorithm increased by 19% and the running is shortened by about 41.4%. This improves the accuracy, speed and efficiency of the image extraction greatly.In order to improve the real-time performance of the algorithm, this paper implements the hardware design and simulation of the saliency extraction algorithm based on FPGA using verilog-HDL. At last, this paper builds the verification system platform of hardware and verifies the function of the hardware design. The results show that the image processing speed of hardware design for the image with 256*256 resolution is 14 ms. It can meet the real-time requirements with 44 fps of the FPGA verification platform. Compared with the traditional image processing time of 0.357s in software platform, the hardware design improves the real-time performance and provides a reference for the real-time image processing of visual prosthesis.