The Design And Implementation Of IEEE1588 Protocol Based On Ethernet MAC IP Core

With the extensive application of network technology,network equipment,especially in the field of measurement and control system or communication system,its requirements for time synchronization accuracy is increasing.On the one hand,as the high bandwidth and reliability,Ethernet technology has become the most common application of local area network;On the other,the Precision Time Protocol,originally defined in the IEEE 1588 standard and officially entitled “Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems” is a protocol used to synchronize clocks throughout a computer network,achieves clock accuracy in the sub-microsecond range,filling the niche not well served by either of the NTP and GPS,making it suitable for measurement and control systems.After studying the IEEE 1588 protocol and the existing Ethernet time synchronization scheme,this paper combined with the laboratory's existing Ethernet MAC IP core,using FPGA + ARM hardware and software co-design platform,independently designed and implemented a set of Ethernet clock synchronization system supports IEEE 1588 standard,and tested the system under Gigabit Ethernet,its synchronization accuracy is better than 30 nanoseconds.As the media access control layer and timestamping extraction function are implemented using FPGA,so the system uses a common Ethernet physical layer chip,has the features of simple structure,low cost and good system portability.Firstly,the paper introduces the basic knowledge of Ethernet media access control layer and IEEE 1588 standard.On this basis,developing a clock synchronization system model that supports IEEE 1588 standard,including master and slave clock model and transparent clock model;and dividing modules by its function,introducing the FPGA implementation of the various functional modules and CPU implementation of the clock synchronization algorithm in detail.Secondly,it gives the simulation results of the main modules in the Model Sim simulation environment.Then,builds a hardware test environment for board level testing and verification.Finally,summarizes and discusses the problems encountered in the study process.The difficulty of master-slave clock synchronization is that there is a frequency difference between different clocks,and this difference varies with the external temperature,which has great influence on the synchronization precision of the system.In this paper,after fully exploring the mathematical relationship between time deviation and frequency drift,a Kalman filter is used to model its frequency,and the synchronization accuracy in board level verification is greatly improved finally,with high stability;The difficulty of implementing the transparent clock is how to accurately get the PTP event message in the clock node internal residence time and modify the correction field before the message leaving the node,to resolve the problem,this paper analyzes the internal data stream transmission process in a switch,and proposes the following three steps: Firstly,the timestamp of the event message to the node is stored in the timestamp RAM by the source port number;Secondly,The source port number follows the event message in the switch transmission;Thirdly,according to the source port number to extract its arrival timestamp,calculate the residence time and modify its frame field when PTP message is sending.The board-level verification is in line with design requirements finally.