Development Of Mutimodenavigation And Positioning Terminal Soc Chip

The design and realization of multiple modes SoC chip on Global Navigation positioning system receiver frontend is the main work of the dissertation.This chip can be applied in BD2、GPS、Galileo Global Navigation Satellite Systems with CK-CORE micro processer,that can deal with acquisition,tracking and positioning estimating and positioning information output of GPS、BD2、Galileo multiple modes Navigation Satellite signal.It provides the baseband chip solution for BD2/GPS/Galileo Navigation Satellite receiver terminal.This thesis puts forward the design scheme of the baseband SoC circuit,verifies the correctness of the SoC circuit,and develops the chip and OEM board which can be produced in mass production through combining with the technical background of the domestic and foreign technology.main contents are as follows:1.The design of the main function modules of the multimode navigation terminal chip.The main modules are acquisition and tracking.Acquisition using a matched filter based algorithm which not only increases the acquisition sensitivity,but also reduces the signal acquisition time.The entire matched filter is 8ms long,divided into 4 subfilters.The sum of the output power of the 4 subfilters,as the final filter result,is given to the test unit.The code tracking loop commonly used in tracking is non coherent lead/lag gate delay locked loop,The PLL is uesd to achieve stable tracking of the satellite signal with FLL,which increases the signal tolerance tracking channel.2.The design of the main function modules of the multimode navigation terminal chip,acquisition using a matched filter based algorithm.The entire matched filter is 8ms long,divided into 4 subfilters.The sum of the output power of the 4 subfilters,as the final filter result,is given to the test unit.The code tracking loop commonly used in tracking is non coherent lead/lag gate delay locked loop,PLL and FLL combine with each other.3.On the technology side,the selecting of the SMIC90nm process which is the mainstream in our country.Clock management module was added in the lowpower design of the SoC.With the clock-gating strategy,the power consumption reduced to the maximum extent.Lay out,powerplan,timing closure,On-Chip-Variation,signal integrity are mainly analyzed.Finally,the area is 4.66mm×4.66mm,and the utilization ratio of CORE is 70%.4.Test and verification of the multimode navigation terminal chip.In the test board design,the multimode-terminal SoC plays an improtant role,the peripheral circuit includes a power supply module,crystal oscillator circuit,reset circuit,UART circuit and Flash circuit,etc.In functional testing,the chip’s techincal and functional indicators are in line with the design requirements.After testing,positioning availability was up to 91.12%～93.1%,this means it can meet the current demand for car navigation market.Equipment used in car navigation can be developed by relying on the circuit which is full-featured and interface-rich,these leading technologies can be marketableapplication and promotion.