Research And Design Of Image Processing System Based On SOPC

At present, the video information based multimedia processing technology has become one of the most dynamic areas in the field of research and application. With the rapid development of multimedia technology and net work technology, especially in some areas such as commercial, medical, industrial, military and so on, the relationship between the video, image, visual, multimedia database and the network technology has become more closely. On the other hand, microelectronic technology has been rapid development, which makes the image processing system based on hardware platform have more advantages. Field programmable gate array FPGA has the characteristics of high performance, high integration,low power consumption and many others, the hardware programmable characteristics and parallel processing capabilities make FPGA has a unique advantage in embedded image processing system. In this paper, a useful research on the digital image processing system based on system on a programmable chip (SOPC) hardware platform and the image processing algorithm under the platform was done.Relying on the real research project, the system is mainly used for the test launch system console, recording indicating lamp change, the number of changes in the hardware devices such as power supply, test module hardware, and record Pyrotechnics equivalent indicator light off and duration of identification. Firstly, various image processing scheme was compared and analyzed, ARM+FPGA was used as the design scheme. Secondly, the digital image processing technology and algorithm is studied, the fast median filtering, edge detection of algorithm hardware logic design and so on are realized using the Verilog hardware description language. Finally, according to the characteristics of image processing in this paper, image processing recognition algorithm which can be easily implemented through NIOS is proposed.In the hardware design process of the system, firstly, an overall consideration was done about the speed of FPGA, the logical resources, computing resources and other aspects, the model of FPGA is selected; secondly, the model of A/D video decoding, D/A video coding,storage devices is selected; finally, each module interface of the system is designed.According to the characteristics of image recognition, the recognition algorithm of indicating lamp and the digital tube which is suitable to this system is proposed, experiments were made to verify this algorithm, The experiments show that the algorithm can identify the indicator lights, digital tubes effectively.According to user requirements, the image processing system based on SOPC is designed. the identification of the indicator lamp status, digital tube digital image is realized.By comparing the recognition results of this system and PC platform system, the results show that the system was better than PC platform recognition system in speed identification, give full play of this system to the advantages of parallel processing video image. In the PC Open CV environment, threading and seven regional statistical method is used to identify and compare the digital tube, the recognition algorithm proposed in this paper is more reliable,higher recognition rate, and meet the requirements of user on the system performance. In addition, the design way of the system is flexible.it can be extended and updated by modifying and arranging of the logical structure and can do the following development. The system provides a high-performance hardware platform for the realization of image-processing algorithms.