Design Of Chirp Signal Generator Based On NIOS

DDS(Direct Digital Synthesizer)is a key digital technology.Compared with the traditional frequency synthesizer,DDS has a low cost,low power,high resolution and fast switching time,etc.,are widely used in the field of telecommunications and electronic equipment,to achieve all-digital device of a key technology.This paper analyzes the Chirp function,the study of the function of the hardware design and implementation,the design scheme based on DDS technology Chirp signal generator,according to the Matlab &Simulink&DSP Builder&Quartus ?design flow,based on design SOPC of Chirp signal generator.Software development and utilization Nios II IDE platform,Bian language programming with C.Program compilation,debugging&running successfully using Flash Programmer programmed FPGA hardware configuration file is downloaded to the chip EPCS configuration and software executable files downloaded to the Flash memory.Matlab&Simulink and Quartus II development software for the design of the simulation to verify that the design can well realize Chirp signal source.Research shows that SOPC technology can be easily programmed by modifying the parameters of the initial frequency chirp signal bandwidth and frequency resolution to be modified.The design method is simple,easy to modify,low cost,and does not involve any programming,easier.