Implementation Of Sub-nyquist Sampling Based On Compressive Sensing

Ultra wideband spectrum estimation is widely used in the field of signal processing and wireless communication.For example,in the spectrum sensing of cognitive radio,it can help users make sure whether the spectrum is not occupied by the licensed spectrum before they establish a communication link.However,people still face many problems in its implementation.A bit more prominent,for the high EIBW(effective instantaneous bandwidth),the implement of the traditional Nyquist sampling system becomes more difficult,because the ADC's bandwidth and sampling rate restrict the range of measurement signal directly.In recent years,with the rising and rapid development of compressed sensing,people have many new understandings on the processing of wideband sparse signal.Combining compressed sensing with hardware implementation can not only reduce sampling frequency but also complete the data compression.Then this way will not lose the signal information after reconstructing the algorithm finally.Therefore,the application of this method in signal processing is used more and more,such as the MWC system proposed by Eldar et al and the NUS system proposed by Wakin et al.Using the sparse characteristics of communication signal in frequency domain,the spectral estimation of wideband signal is modeled as a problem of compressive sensing,to achieve a new Nyquist sampling framework.This framework is divided into two parts,signal acquisition and signal reconstruction,to deal the problem of spectrum sensing.The focus of this paper are signal acquisition and the design of hardware experimental platform with the GAMP-PCSBL algorithm.The platform doesn't only replace the traditional Nyquist sampling with low sampling frequency,but also has a less cost in hardware.The main work of this hardware experimental platform is divided into two parts:hardware design and system debugging.The hardware design include the hardware implementation scheme,selecting the chips and designing the circuit,consisting of frontend receiver module,delay module and digital acquisition module.The digital acquisition board controlled by FPGA,can achieve synchronous acquisition and mass storage of multi-channel ADCs flexibly by programming.According to the requirements of sampling framework,the delay module is very important in the whole system.After passing the power allocation and delay circuit,the signal is sampled by sub-Nyquist rate,and the sampling rate of the single channel ADC can be as low as 80MS/s for 1GHz bandwidth signal.The system is debugged from the shallower to the deeper and the debugging includes three parts.At first,make sure each module is ok.Then every module is integrated to debug together.At last,the data sampled from the platform is sent to the algorithm group to reconstruct.