Research And Simulation Design On Low Capacitance And High Surge ESD Protectiontvs Array

Transient Voltage Suppressor is a kind of high efficiency ESD protection device. As the rapid development of portable products, TVS is wildly used, especially in High speed data transmission, low capacitance is necessary. In this thesis, introduce the study situation on TVS, and discuss how to manufacture SRV05-4.With the study on TVS key parameter, the key point to improve capacitance, This thesis analogy the low capacitance TVS theory and structure, find out: the active area and capacitance in the direct ratio, doping concentration and capacitance in the direct ratio. Junction resistance influence the Surge current improved. With a series connection low capacitor diode,can reduce the capacitor of TVS.Because of the complex process, this article conducts the research and introduction of CAD software in IC design. With CAD method, the layout of the device is simulated and verified by the layout design software L-Edit. The device structure was simulated by TCAD software, and the structure diagram of the device was obtained. Get the real data obtained by dividing the PN grid adjustment software. In order to improve the performance of the device, the electric field, the current density and the electric potential distribution of the device are observed and analyzed by TCAD, and the improved scheme is put forward. The LCTVS device is finally completed.Use a dual chips package method, put the LCTVS packaged with the other TVS, to improve the Surge current. By change the TVS and improve the wire bonding, find an appropriate way to manufacture the device. Finally,the device can meet the parameter: 5V, 1.8PF, 17 A, 8KV.This thesis study on failure mechanism, theoretical analysis, Computer Aided Design, process validation, wafer Manufacture, package, and improve both the capacitance and the surge current, produce a Low Capacitance and High Surge ESD protection TVS Array...