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Hardware Design For A Face-based Video Retrieval System

Posted on:2016-01-21Degree:MasterType:Thesis
Country:ChinaCandidate:Z T ZhouFull Text:PDF
GTID:2348330503958065Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With a large-scale application of the video monitoring system in the filed of security and industrial production, a massive video data which mainly record personnel activity is produced. Whenever tracking events is needed, the staff will get involved in the time-consuming and labor-intensive process of human video playback. Face is the most representative feature, and the face feature has great significance in intelligent video retrieval. As the key technology of video retrieval system based on face information, face detection and recognition algorithm involve a complicated and time-consuming calculation process. In this paper,a system architecture is implemented by hardware acceleration algorithm and the specific circuit is designed. Face recognition algorithm based on LBP operator and chi-square distance classifier are selected as pointcut, and the most core LBP algorithm was already implemented on FPGA. The research work mainly includes:(1)A system architecture scheme applied in the video retrieval system is proposed, and the card circuit based on the PCIe interface is designed. The scheme first gets video stream data of the PC and send them to hardware interface card by PCIe interface, then decodes the video stream data and performs face detection and recognition algorithm. Finally the result of detection and recognition is sent to PC for a further processing, and the goal of system optimization to accelerate is achieved.(2)A method of realizing LBP operator is proposed after analyzing and implementing the face detection algorithm based on LBP operator and chi-square distance classifier. We apply Verilog hardware description language written on Quartus II in the Cyclone IV, then the ModuleSim is supplemented for simulation analysis. The method processes data by image data buffer module and LBP algorithm; it can complete a 3 * 3 template image data processing in just a single clock cycle and get the neighborhood LBP. Moreover, the comparison of the LBP from the VGA interface with that from MATLAB software running results shows that the data are consistent in ignores of boundary data for the different ways of image boundary processing. In the process of LBP algorithm module implementation, analysis of the comparator logic implementation indicates that in the condition of completing the same function, the two input xor logic data comparator accounts for a fewer resources than the data comparator realized by two input selector.
Keywords/Search Tags:Video retrieval, Face recognition, LBP, FPGA
PDF Full Text Request
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