Construction And Decoding Algorithm For Low Error Floor LDPC Codes

Low-density Parity-check(LDPC) codes have low-complexity decoding and capacity-approaching performances, so that they can be widely used in data storage and communication systems. However, the error floors, which are shown in the simulations, hinder the further improvements and wider applications of LDPC codes. Therefore, the researches on encoding and decoding of low error-floors LDPC codes to improve their performances and reduce the complexity have significant values in theory and applications.According to the related researches, the trapping set is the main culprit of error floor. To lower the error floor, the optimization of the code constructions should be done, such as the growth of girth or minimum distance. The construction of check matrices fall into two categories, namely random construction and structured construction. The former one has better performance, but its irregularity makes it harder for the realization in hardware. Therefore, we turn to adopt the structured construction as the mainstream, including Quasi-cyclic(QC), progressive edge grow(PEG) and lattice etc. This paper introduces a combinatorial construction of girth-10 LDPC codes based on rectangular integer lattices, achieved by a more tighten selection of sets of parallel lines to avoid triangle and quadrangle in configuration. As a result, girth-10 LDPC codes can be obtained to improve performance and lower the error floors significantly. Besides, the resource occupied by realization in hardware and complexity can be reduced for the quasi-cyclic structure in check matricesTo improve its performance and lower the complexity, a divide and concur weighted flipping decoding is proposed based on the combination of divide and concur decoding and bit flipping decoding, which keeps the delicate balance between complexity and performances. In addition, to lower the error floors, a two-stage selective decoding algorithm is presented. An efficient stopping criterion is proposed to avoid unnecessary iterations in the first stage. If the stopping criterion is reached, the first stage decoding will be terminated in advance and the second stage decoding will be started, where the unsuccessfully decoded words in the first stage are re-decoded by manipulating the log-likelihood ratio(LLR) values of two types of specifically selected variable nodes. One is doubtful nodes which can be sorted and flipped in doubtful degree; the other is credible nodes which will be strengthened properly. Simulation results validate that the proposed algorithm can effectively lower the error floor of LDPC decoding while maintaining a low complexity, compared to three other decoding algorithms for error floors. The further optimization can make it easier for realization in hardware as to have higher values in application.