Research Of Fast 3D Imaging Based On Multiple Mode

Three-dimensional (3D) imaging has received increasingly extensive attention and has been widely used currently. Lots of efforts have been put on three-dimensional imaging method and its system study, in order to meet fast and high accurate requirement. Based on our lab's former research results, and bonding each advantage of time-of-flight (TOF) non-scanning camera (depth camera) and binocular vision, this thesis proposes a stereo matching system using field programmable gate array (FPGA) with Nios II cpu. From this, an embedded system doing stereo match is expected, which can expand applied fields.The overseas and domestic research status of depth camera and stereo vision is introduced, so are strength and development situation of using Nios II and FPGA to image processing. Some realizable ways are described. After analyzing and comparing the principle and feature of Nios II and FPGA applied to image processing, a SOPC system based on FPGA with Nios II processor is designed. This system uses verilog, a hardware programmed language, to design census transform calculation IP core and hanmming computing IP core, and establishs Nios II control cell to execute the algorithm, for the sake of accelerating the stereo matching speed.The simulation results demonstrate that this system based on Nios II can realize the stereo match, and modified census transform in area-based stereo match algorithm is convenient to achieve.For the collateral algorithm and parallel operation for FPGA, the approach using FPGA is fairly helpful for real-time image processing in machine vision. In the meanwhile, it's a good way to develop muti-processor to solve problems, because Nios II is programmable and flexible.For the sake of using the Nios II to stereo match, the application in the mobile Internet, the Internet of things or games will be not far.Finally, the summary of this thesis is given and some discussions about further research of this project are proposed.