Design And GPU Implementation For Millimeter-Wave MIMO Receiver

With the flourish of mobile Internet, it's necessary to develop a new generation communication system. 5G is the fifth generation communication system which is aimed to satisfy the communication demands after 2020. Millimeter-Wave is one of the key technologies of 5G. Because of its short wavelength, which has an advantage of high integration, Millimeter-Wave is very suitable for MIMO architecture. However, with the increase of the number of antennas equipped with MIMO system, the complexity of the whole system becomes higher and higher. Algorithm parallelization becomes an important method to relieve this difficulty. On the other hand, research on the communication algorithms implemented on GPU has become a hot topic, because of GPU's strong parallel computing power. In this thesis, we research on the parallel algorithms for Millimeter-Wave MIMO receiver. The main work and innovations are as follows.Firstly, we research on the parallel design of equalization and detection module of MIMO receiver, we propose a low complexity complex matrix inversion scheme which bases on modified Givens rotations al-gorithm. The squared root and division operations during the givens rotations could be efficiently avoided, which reduce the complexity of the whole algorithm. Compared with the traditional matrix inversion algo-rithms, the algorithm we proposed could save the division operations effectively. Especially, it could save multiplication and division operations up to 14.3% and 60% respectively compared with the SGR algorithm. The simulation results also show that the algorithm is also valid when the matrix dimension reaches to very large, which means this algorithm is also suitable for Massive MIMO receiver.Subsequently, we realize this complex matrix inversion scheme on heterogeneous multicore architec-tures. The implementation results based on CUDA show that, with the increase of the matrix dimension, the parallel realization shows its advantage:when the matrix become larger than 500 x 500, the time cost of parallel realization is at the magnitude of 100ms while the time cost of serial realization is at the magnitude of 10000ms. And the time speed up ratio could reach to 20x, the throughput could reach to 11gigaflops/s.Then, we research on the decoding algorithms of data packet encoding scheme. The data packet encod-ing scheme proposed by TGaj group, is a new coding scheme based on LDPC code. We propose an iterative decoding algorithm based on the min-sum algorithm. Through de-selection of bits to calculate the soft in-formation LLR of the bits. Then decode each LDPC code word via the layered modified min-sum decoding algorithm. Through the Min-Sum algorithm to compute the LLR information of the error LDPC code words, and return back to iterative decoding. The decoding stop until up to the highest iterative times or all LDPC code words are decoded correctly. The simulation results show that with different codes rate and different code numbers, the algorithm could achieve SNR gains.Finally, we implement this decoding algorithm on GPU architecture. The implementation results show that, the parallel realization on GPU could take an advantage over the serial realization on CPU. When the iterative time is 30 and the the code numbers are 10,25 and 50, the parallel realization could achieve 4x speed up. It also demonstrates that there is a positive correlation between the speed up ratio and the iterative times. And the speed up ratio decreases with the reducing of the code numbers.