Study And Realization Of AFOCS Signal Detection System

All Fiber optic current sensor(AFOCS, All Fiber optic current sensor) based on Faraday magneto-optic effect is used as a new device in the current detection or relay protection. The advantages like strong anti-interference ability, fine insulation and wide measuring range make it has fine market and broad application prospect.Based on the characteristics of closed-loop interferometric AFOCS output, a signal detection system with single chip FPGA as the core is designed in this paper. the From the perspective of improving AFOCS current detection range and accuracy, this paper designs a signal detection system based on FPGA. This system consists of hardware circuit and Software implement based on FPGA. Hardware circuit consists of I/V circuit, fixed amplification circuit, spike pulse shearing circuit, AC/DC separation circuit, AGC and AD?DA converter. Software implement contains sequential controller, square and ladder signal generator, correlation demodulator and divider.The mainly content of this paper mainly is: 1) Signal analysis and simulation. Simulating signal in Matlab to validate the feasibility of extracting the useful signal by digital comb filter and shearing spike pulse by analog switch; Using Multisim to build a simulated signal generator in order to simulation debug hardware circuit. 2) Hardware circuits designed and implemented. Designing Low noise I/V circuit by utilizing the grounding protection loop to reduce leakage current between the pins; Designing spike pulse shearing circuit to shear spike pulse; Designing AC/DC separation circuit to magnify AC and DC components respectively and make preparation for the division between DC and AD components;Designing a digital medium frequency peak value detection circuit for AGC circuit which has precise gain to enhance the input dynamic range and measurement accuracy of the system; Designing a clock jitter elimination circuit to eliminate the impact on data collection by edge vibration of clock produced by FPGA. 3) System designed and implemented by FPGA. Designing a sequential controller to synchronize and control each module;Generating square and ladder signal and add them before DA to make the phase of them strictly synchronized and decrease the complexity of the system; Designing two dividers torespectively realize AC divide DC and Faraday phase shift divide a constant to get current value directly.After testing each module of the system, we can know that the front pretreatment circuit can remove the spike effectively. After improving the AGC circuit, the power supply noise reduces 24 times, and the peak-to-peak value can be stabilized in 2±0.2V when input is in wide dynamic range. The actual value of square amplitude modulated by current is very close to the theoretical value of square amplitude, and when current is small, the relative error of system is large, when current is large, the relative error of the system is small.