| As the behalf of the third generation of wide-bandgap semiconductor material, Ga N becomes a hot research topic owing to its excellent frequency, power and thermal properties. Enhancement-mode Al Ga N/Ga N high electron mobility transistors(HEMTs) and Ga N E/D-mode digital circuits are investigated in this thesis. The equivalent circuit models of enhancement-mode and depletion-mode Al Ga N/Ga N HEMT are built. Ga N E/D-mode digital circuits are designed and emulated using the device model made above.The devices with gate recess etch exhibit a threshold voltage of 0.8 V, a peak transconductance of 234 m S / mm and a maximum drain current of 150 m A / mm. The devices treated by fluorine plasma show a threshold voltage of 0.5 V, a peak transconductance of 185 m S / mm and a maximum drain current of 227 m A / mm. It obtains optimized treatment conditions through the analysis of device characteristics at different area. When the etching power is at 15 W and etching time is 120 s~130 s, an enhancement-mode HEMT which shows better characteristics will be observed. The gate-recessed depth is about 80 nm. For HEMTs treated by fluoride-based plasma treatment, the device performance in an ICP system is better than that in a RIE system. It is suitable to use higher power and shorter treatment time. Samples treated by fluorine plasma at a RF power of 60 W for 60 s in an ICP system can achieve a stable threshold voltage.EEHEMT model is selected as Al Ga N/Ga N HEMT equivalent circuit model. This thesis uses the established model to fit DC characteristics of actual D/E-mode HEMT, respectively. By the comparison of the simulated and measured data, the accuracy and stability of the nonlinear model is proved. The model can fit the transfer curve well. However, for fitting the output curve, there are some differences between the model and actual device. D-mode HEMT is mainly due to knee point voltage, Vknee. In the model mentioned above, Vknee is a fixed value, but Vknee shows a linear variation with the value of Vgs in the real HEMTs. E-mode HEMT is mainly due to the device processing which is more complex and always affects their performance. So that the saturation output current is relatively small and deviates from the ideal value.With respect to Ga N-based enhancement / depletion-mode digital circuits, the main research focuses on the voltage level shifter circuit design and simulation, using HEMT models built above. Firstly, the study on inverter that is the basic unit of a digital circuit is carried out. Through the simulation analysis in ADS, the size of HEMTs used in voltage level shifter circuit is determined. The simulation results of the circuit basically meet the design requirements. When the input voltage VIN is low level, VOUT1 is high level and about 0V, VOUT2 is low level and about-4 V; when the input voltage VIN is high level, VOUT1 is low level and-3.9 V around; VOUT2 is high level and about 0 V. Moreover, the intersection of two output voltage curves is around-2 V. When VIN converses between low level and high level, the output voltages, VOUT1 and VOUT2 are able to change. The influence of HEMT, particularly enhancement-mode HEMT threshold voltage on voltage level shifter circuit is given. |
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