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Design And Simulation Of 4H-SIC MESFETs Structures In View Of The Improved Buffer Layer

Posted on:2016-10-21Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhangFull Text:PDF
GTID:2348330488474204Subject:Microelectronics and Solid State Electronics
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As the third generation of broadband gap semiconductor materials, Silicon carbide materials exhibit excellent material properties. The metal semiconductor field effect transistors(MESFET) work in high frequency, which is hard to occur secondary breakdown. 4H-Si C MESFETs have a wide application in communication, radar and other equipment in the microwave frequencies with the advantage of high output power density, superior thermal conductivity and high reliability. However, some factors, such as trap effect, high surface state, electric field bombardment effect, will lead to a decline in the output power and frequency characteristics. It is necessary to modify the device structure to improve the device performance. Increasing channel thickness leads to mutual suppression and conflicting results: drain current increases but breakdown voltage reduces, and gate-source capacitance decreases but transconductance also reduces. Therefore, it is need to improve local buffer layer pointedly, and combine with the top improvement to solve the above restriction relationship.An improved multi-recessed 4H-Si C MESFET with double-recessed p-buffer layer(DRB-MESFET) is proposed in this paper for the first time. The simulations show that the recessed source/drain drift regions can weaken the general electric field crowding effect at the gate corner near to the drain side, thus improving the breakdown voltage effectively. The recessed region stops the gate depletion layer extending toward the source/drain side, which will lead to the decrease of the gate-source capacitance and drain-gate capacitance, and increase the frequency characteristic and small signal gain performance. Moreover, by introducing a double-recessed p-buffer layer, the effective channel thickness widens and the drain current increases significantly, which strengthens the control action of gate to current and improves transconductance characteristics. In comparison with the structure without the double-recessed p-buffer layer, the DRB-MESFET has a little change with gate-source capacitance but improves transconductance significantly, which makes the device frequency characteristics improved effectively. Obvious improvements can be obtained for the DRB-MESFET compared to the DR-MESFET, such as a 38% larger of the saturation current, a 27% higher of the breakdown voltage, a 74% larger of the maximum output power densities and a smaller 32% of the gate-source capacitance. And the cut-off frequency and maximum oscillation frequency are 24.7 and 63.9 GHz in comparison with 16.7 and 57.2 GHz of the DR-MESFET.A novel 4H–Si C MESFET with ?-gate and recessed p-buffer layer(?RP-MESFET) is proposed. By changing the location of upper-gate and lower-gate relative to the channel surface, the channel thickness under gate is wider and a larger drain current can be obtained. At the same time, the lower-gate at source side does not sunken into channel, which reduces its electric field crowding effect at that point and improves the device breakdown voltage. On account of the recessed p-buffer layer into channel, the relative distance of lower-gate and the bottom of channel is unchanged, which makes sure that channel current can be controlled by gate voltage effectively and the device frequency characteristics are improved significantly. The simulation results show that ?RP-MESFET has an improvement of 42% in the maximum power density and 19% in the cut-off frequency compared to DR-MESFET. If the height of upper-gate relative to the channel surface increases, the gate depletion layer has less area in channel layer, which not only increases the drain saturation current, but also suppresses the gate depletion layer extending toward the source/drain side and reduces the gate-source capacitance and drain-gate capacitance. Most significantly, with the increase the height of upper-gate relative to channel surface, a bigger electric field density value occurs at the upper-gate corner near to the source side, which will ease the electric field crowding effect effectively and improve the device breakdown voltage.
Keywords/Search Tags:4H-SiC MESFETs, buffer layer improvement, double-recessed structure, double-recessed p-buffer layer, ?-gate and recessed p-buffer layer
PDF Full Text Request
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