| In recent years, with the wireless communications applications used in the portable products and Be Dou navigation, it has prompted wireless standard to an unprecedented development. Due to the growing demands, it calls for a gradual increase requirements for wireless communications products. A simple single-handle chip has been completely unable to meet people's needs. Compared to before, it requires to achieve a single-chip can deal with multi-signal processing, lower power consumption, and smaller area. So the design of a highly integrated, low-power, high-performance wireless RF transceiver chip has become a research focus.In the process of the development of wireless communications, the cost efficiency of CMOS process greatly enhances the multi-mode wireless applications emerge. Now the multi-mode / multi-band receiver is mainly based on reuse programs. They avoid the use of a plurality of chips, which makes the area and power consumption being effectively.For multi-receiver front-end signal processing, analog baseband filter design is a critical task. Analog filter is used to select channel in a multi-mode receiver. How to design a high linearity, high rejection ratio and a wide tuning range filter is gradually becoming the focus of scientific research in the institutions, and therefore, it is necessary to design the reconfigurable bandwidth filters.This paper mainly discusses the method to design a high linearity and wide tuning range filter. Through analysis and improve the transconductance's linearity to enhance the filter's linearity. And by improving the transconductance's structure to achieve a wide range of transconductance tuning, so that the entire filter achieved a 0.65 MHz ~ 20 MHz range. By optimizing the Q value of the entire circuit, the overall circuit of the second harmonic attenuation reaches 20 dB / dec in the entire range. For the circuit and layout are based TSMC0.18 um process has been completed, the whole circuit has been taped. |
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