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The Design And Research Of On-chip Transformer With High Common Mode Transient Immunity

Posted on:2019-06-01Degree:MasterType:Thesis
Country:ChinaCandidate:J L ChenFull Text:PDF
GTID:2322330569995418Subject:Engineering
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The emergence of new power transistor technology based on wide bandgap semiconductors offers a jumping performance over traditional transistors based on silicon technology.With more and more power conversion circuits using these new power transistor,the higher common-mode transients voltage could be the biggest problem for digital isolator designers.For the traditional transformer with no ground shield(None),the common-mode voltage will induce displacement currents in the parasitic capacitance between the coils during switching.A voltage will be generated at the secondary coil,and may result in wrong signals to be detected at the secondary side.In order to reduce this parasitic capacitance,a ground shield is introducing into the transformer in this paper.The first ground shield structure proposed in this paper is solid ground shield(SGS).As SGS is electrically connected to the ground of the secondary coil,all parasitic capacitive coupling from the primary side will be linked to the ground of the secondary coil.While the SGS provides excellent capacitive shielding,it may also block the magnetic field and cause performance degradation of the transformer.When a input signal is applied to the primary coil,a changing magnetic field will induce a significant eddy current in the SGS.This eddy current will induce power loss and also will generate a changing magnetic field to partially cancel the original magnetic field.To reduce this eddy current induced in the SGS,the current path loop needs to be broken up.This can be achieved with a patterned ground shield(PGS).To show the effects of the shielding structures,on-chip isolation transformers with no shielding,with a SGS,and with a PGS are simulated using software ANSYS HFSS.It can be seen that compared to the None,using the SGS will cause substantial decreases in the Lp(up to 23%),the Ls(up to 27%),and the M(up to 32%),while the decreases in the inductances are negligible with the PGS.Before LC resonance,the PGS causes a less significant resistance increase than the SGS.It can be seen that using the SGS will cause a notable decrease(up to 16%)in the voltage gain while the decrease is negligible with the PGS.In the simulated electric field magnitude distributions,it can be seen that the SGS achieves excellent capacitive shielding,while the PGS reduces the electric field magnitudes by about 10 times on average.To demonstrate the improvements in the dV/dt immunities with the shielding structures,transient simulations were performed using HSPICE.It can be seen that the ripple voltage from the secondary coil has an oscillation peak value of 5.50 V for the None,0.59 V for the PGS and the SGS achieves excellent dV/dt immunity.In conclusion,using the SGS can achieve an excellent dV/dt immunity at the cost of lower inductances and a lower voltage gain,while using the PGS can improve the dV/dt immunity by around 10 times without notably sacrificing the inductances and the voltage gain.Therefore,the PGS structure provides a new method to improve the commod-mode transient immunity of the digital isolator.
Keywords/Search Tags:on-chip transformer, digital isolator, common-mode transient immunity, ground shield
PDF Full Text Request
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