Research Of Design And Implementation Of Ultrasonic Cleaning System Based On FPGA

Because of its high directivity,high penetrability and high energy,ultrasonic is widely used in Ophthalmology,surgery,oncology,dentistry,Dermatology and ENT.With the development of modern electronic technology,ultrasonic cleaning system is developing towards high reliability and high stability.However,due to lack of accumulation of control technique,and some defects in the material process,the domestic ultrasonic cleaning system has the defects of poor spall effect,the damage of ultrasonic handle,and can not be widely accepted by the foreign markets.The purpose of this project is improving the performance and reliability of ultrasonic cleaning system by means of control.Based on the mathematical model of piezoelectric ultrasonic transducer,the control scheme of ultrasonic cleaning system is redesigned.The PID algorithm is used to realize the high-speed calculation of the phase difference to the signal frequency.The frequency tracking speed of the driver’s output signal is accelerated,and the output power of the ultrasonic handle is improved.The abnormal working state of ultrasonic transducer is detected by FFT spectrum analysis,the protection function of piezoelectric ultrasonic transducer driver is increased,and the reliability of the hardware is improved effectively.In this paper,the principle of piezoelectric ultrasonic transducer is systematically introduced,and a mathematical model of piezoelectric ultrasonic transducer is established,which lays a theoretical foundation for the design of the control scheme.According to the theoretical analysis,in order to pursue the optimal power output,the output signal from the source frequency must track the resonance of piezoelectric transducer in the shortest time,so the control scheme must satisfy two basic conditions of high speed and high speed operation interface.In several control schemes,this paper chooses the idea of system on chip to design the control system of piezoelectric ultrasonic transducer,that is to build Nios II soft core in FPGA.According to the characteristics of sub functions not only can flexibly select high speed digital circuit realization or code implementation,will combine the high speed and low speed,and improve the system integration level,make full use of resources.In this paper,two chapters from two aspects of hardware and software refinement and implementation of the design program,completed the system design.Finally,the experimental results are given.The main innovations of this paper are as follows:1.An efficient control scheme of ultrasonic stone cleaning handle based on themathematical model of piezoelectric ultrasonic transducer is put forward.2.The improved PID algorithm is applied to the driving field of ultrasonic stone handle,which greatly improves the matching speed of the resonant point of the piezoelectric ultrasonic transducer.3.By means of real-time monitoring power and distortion,the over power protection and non resonant point protection of ultrasonic cleaning handle are realized.