Hardware Design And Implementation Of Inertial Measurement Computer For Tilting Trains

When the train at high speed turning,as a result of the existence of a centrifugal phenomenon,train will appear to the trend of the circumferential lateral tilt,in extreme cases there will be a serious tilt,even a physical phenomenon more curved areas such as limiting the train in the hills.As much as possible in order to make full use of existing resources,improve the train in curved areas more running speed,there is a novel structure of train-the tilting train.The train through the range of the gyroscope measure the body roll,and then control variable suspension of circumferential lateral wheel lifting,increase body outer height from the ground,outside the body as a whole to present within the high low status to incline to counteract the negative effects of centrifugal phenomenon.Roll of tilting train suppression system working principle and process is as follows:(1)when high-speed train into a curved,gyroscope measure the tilt amplitude in real time;(2)the amplitude of the gyroscope will tilt analog signal input to the inertial measurement computer;(3)the inertia converts analog signals into digital signals and according to the internal operation algorithm of the data;(4)to control data output to the servo control variable suspension wheel lateral inhibition.Based on the application requirements the inertial measurement of tilting train is put forward the technical index of the control computer,hardware design scheme is given.Electrical performance,the computer system by the central processing unit(CPU),peripheral memory,pulse counter,A/D conversion,timer,interrupt controller,pulse output module,CAN bus,switch input and output,and asynchronous serial communication port of several parts,such as the central processor DSP,pulse counting,pulse output,asynchronous serial port,watchdog monitoring,reset and deal with the switch input and output,and other functions performed by FPGA.According to the real condition of the use of the computer system of reliability design is analyzed,mainly include the following aspects:the mature technology,simplified design,derating design,the application of the isolation technology,measurability design,environmental adaptability design.The key to a computer system timing measurement verification.FPGA has great advantage to improve the system integration and miniaturization,inertial measurement of FPGA computer system is mainly used to implement the following functions:the inertial computer control signal decoding,reset and watchdog monitoring,bus timeout monitoring,24 pulse output pulse counting,3 road,3 road UART,switch input and output,the peripheral chip control signal generation,clock divider output.In this paper,the FPGA realization process of each function are described.This thesis also did simulation and test coverage check on the FPGA,including the simulation environment installing,front design.Simulation used Active ALDEC Inc-HDL7.1 the back-end design tools used Actel Libero IDE v8.0,comprehensive tools used Synplify Pro 9.6.2,layout used Actel Designer v8.0,layout simulation used ModelSim Actel 6.2 g.Test bed was designed,incentive model of the design unit supported by the various operations,mainly through the interface functions of the design unit load excitation signal,at the same time through the ASSERT statement or check to determine the effectiveness of the output signal waveform.Various incentive model of the design verification is completed.Finally,completed the principle prototype design,validation,and simulation of a computer system.Through the code inspection,in line with the code design specification.Response tests and simulation waveform inspection,determine the design function meets the requirements.