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The Research Of GNSS RF-Front Circuit

Posted on:2018-12-26Degree:MasterType:Thesis
Country:ChinaCandidate:J X SunFull Text:PDF
GTID:2322330515959894Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
In recent years,with the rapid development of the small satellite technology,the small satellite with its low cost,short development cycle and other unique advantages,has gradually been widely concerned by the international community.However,due to the constraints of the small satellite platform space and power consumption,the requirement of miniaturization the traditional space borne GNSS receiver is put forward.Based on this,this paper discusses and studies the GNSS RF front-end circuit,which is of some reference significance for the future development of the RF front-end of the satellite receiver.Firstly,the theoretical basis of the parallel technology of SAW filter in GNSS RF front-end circuit is presented.From the theoretical analysis of the feasibility of two separate surface acoustic wave filter front-end through the impedance change of the diplexer.Through the simulation analysis and the actual use of L1 and L2 band two separate filters in parallel to verify the parallel technology.The experimental results show that the insertion loss of the filter front-end impedance changes after L1 and L2 band two port value is 2.9dB and 1.6dB,the isolation of 40 dB,this method can make the filter tip due to power points caused by the mismatch can be effectively reduced,to achieve the function of duplexer.Secondly,the relationship between the loop bandwidth of the PLL and the phase noise and the locking time of the GNSS RF front-end circuit is discussed,and it is verified by the software simulation and the PE3236 phase-locked loop circuit.When the loop bandwidth is larger,the locking time is relatively short,but the output phase noise is poor.When the loop bandwidth is small,the locking time is relatively long,but the output phase noise is better.Based on this,a new method is proposed to select the optimal loop bandwidth of PLL,and the optimal loop bandwidth is verified by formula derivation,board level test and contrast test.Then the RF IC chip in the GNSS RF front-end circuit is investigated.First of all,the process of GNSS RF chip is introduced in detail,and a number of domestic and international radio frequency chip is selected to analyze and compare the specific functions and indicators.Due to the current GNSS RF chip supported by the frequency band can't be freely set,so choose Maxim MAX2112 RF chip design GNSS RF frontend circuit.The chip supports the selection of the local oscillator frequency of 1-2 GHz,and can be controlled by the software configuration program to control the internal registers of the RF chip.Furthermore,the design of GNSS RF front-end circuit based on MAX2112 is presented.The design of the RF front-end circuit in the device selection and link budget are analyzed in detail,and the circuit design of the power supply module,loop filter module design is described in detail.Because of the large number of internal registers and the complex configuration of the MAX2112 chip,the register configuration is designed.Finally,the GNSS RF front-end circuit is debugged and tested,and the key parameters are compared.The test data show that the gain of the RF path can reach 71 dB,and if the out of band output is above 30 dB,the RF front-end circuit is stable.Because of the influence of space radiation on the integrated circuit device in the satellite equipment,the anti radiation of the RF chip is evaluated.Pulsed laser single particle latch up test for MAX2112 RF chip.The chip anti lock of linear energy transfer(LET)10MeV·cm2/mg.
Keywords/Search Tags:GNSS, RF front-end, Parallel filter, PLL, MAX2112
PDF Full Text Request
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