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Improvement On Parameters Of Chip-scale Atomic Clocks Based On FPGA

Posted on:2018-05-31Degree:MasterType:Thesis
Country:ChinaCandidate:E M RuanFull Text:PDF
GTID:2322330512999426Subject:Radio Physics
Abstract/Summary:PDF Full Text Request
Chip-scale atomic clock(CSAC)is a new type of atomic clock to be of watch size and supported with a Button battery.It is widely applied to the navigation satellites,astrometry and underwater navigation.This thesis mainly studies parameters optimization of chip-scale atomic clock based on the Field Programmable Gate Array(FPGA)to further reduce the resource usage of CSAC,and improve the frequency stability and frequency accuracy.The main research content of this paper is as follows:Firstly,we propose an Infinite Impulse Response(IIR)filter scheme to deal with the output signal of CSAC.According to our study results,the design can help to reduce the volume and to improve short-term frequency stability of CSAC.the design with less order can help to reduce logic resources of FPGA by nearly 58%when comparing with FIR filter.Besides,the short-term frequency stability of CSAC is improved from 2.8×10-10τ-1/2(τ=1-100 s)to1.4×10-10τ-1/2 and the circuit size is reduced by 10%when compared with analog filter.Secondly,we use the design of Kalman filter to deal with temperature signal.In the temperature detection of Vertical Cavity Surface Emitting Laser(VCSEL)and atomic vapor cell,we use Negative Temperature Coefficient(NTC)thermal resistors to collect the signal.After Analog to Digital conversion,Kalman filter is taken to deal with temperature signal.The results show that the temperature fluctuation range is reduced from 2.01×10-2℃ to 6.7×10-3 ℃ in absorption cell and the range from 1.5×10-2℃ to 6×10-3℃ in VCSEL.It filters high frequency noise and improves smoothness and stability of temperature signal.The improvement of accuracy can help enhance the temperature control of chip-scale atomic clock.Besides,it plays a significant role in both optimizing the parameters and improving the performance of CSAC.Thirdly,we propose the orthogonal demodulation scheme based on the Coordinate Rotational Digital Computer(CORDIC).The scheme replaces multiplication with addition,subtraction and shift operations to reduce computational work and requirement to logic resources.The improved CORDIC algorithm is realized with pipeline structure in laser frequency locking loop of CSAC.Compared with the normal CORDIC scheme,the realized scheme adds octant mapping partition to extends the cover range to entire circumference and increases the function of pre-processing initial values x0 and y0.The improved scheme reduces the number of iterations,optimizes the structure and improves the accuracy of the algorithm.Experimental results show that the NCO based on improved CORDIC algorithm can reduce the occupation of logical resources by 15%,and improve the accuracy of the operation to 10-4~10-5.
Keywords/Search Tags:chip-scale atomic clock, IIR filter, the digital orthogonal demodulation
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