Study On The Key Technology Of Stripe Light Centerlines Based On FPGA

With the rapid development of the high-speed rail in China,the high-speed rail gradually comes into our lives.It has advantages of fast runing,safety,comfort,and so on,and has become an important means of transport.And it is an unsolved problem how to carry out the maintenance of high-speed rail,to ensure high-speed rail to continue safe,comfortable and high-speed operation.The main task of the high-speed rail overhaul project is to detect whether the high-speed rail is deformed,whether there are foreign objects,whether the screws are loose or even fall off,etc.The main work includes CCD camera calibration,stripe line-structure light centerlines,high-speed rail information processing and so on.This paper is a part of the high-speed rail overhaul project,aims at study and exploration of light stripe centerlines.In this paper,the 3D measurement technology is applied to the project,to determine the safety of the high-speed rail by analysis and process of measurement data.The striping light centerlines is the first step in the high-speed rail maintenance project,the effect of stripe light centerlines will affect the subsequent work,and therefore,the stripe light centerlines is very important.Scholars in domestic and overseas had studied the stripe light centerlines algorithm for several decades,and had put forward a series of light strip centerlines algorithm.But in complex application,the existing algorithm are not fit the high-speed rail detection,and the result of centerline extraction is not ideal.Thereare a lot of difficulties needed to be overcome,such as the centerlines position deviation,weak anti-noise ability,the balance of extraction speed and accuracy.It requires to improve the stripe centerlines algorithm so that can better adapt to the high-speed rail detection.This paper study the stripe light centerlines technology for the high-speed rail detection,including the algorithm of centerlines extraction and hardware implementation of the algorithm.To address the problem that the existing stripe light centerlines algorithm cannot meet the speed and accuracy requirements of high-speed rail maintenance project,based on the current technology of striping light centerlines,this paper proposes an improved gray barycenter centroid method.First of all,we need to pre-process the light image and use the median filter to suppress the noise,aim to better stripe light centerlines;and then light image is segmented by Otsu method,extract the target area from background;and use gray value weighted calculation,and then stripe light centerlines.The experiment results show that the proposed method can satisfy the high-speed rail detection in complex environment,and has a good performance in real-time as well as high precision.At present,the speed of high-speed rail is 350 km / h,and the stripe light centerlines algorithm in software cannot meet the requirement of high-speed rail real-time detection.Therefore,the hardware design of the stripe light centerlines algorithm is carried out.According to the characteristics of FPGA,hardware architecture is designed on the base of gray barycenter centroid.After repeated debugging,it can be realized on FPGA.The architecture mainly includes median filter module,image segmentation module,centerlines extraction module,Camera Link standard interface,DVI interface and so on.The experiment results show that the designed hardware can meet the requirements of high-speed rail real-time detection,with high precision and good stability.