Font Size: a A A

Real Time VaR Research Based On The Heterogeneous Architecture

Posted on:2016-11-05Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2309330473952285Subject:Software engineering
Abstract/Summary:PDF Full Text Request
The strategy and risk control modules are the most important essential parts of financial automatic trading system. The Value-at-Risk(VaR) has been considered the industry standard for quantitive analysis of the portfolio market risk in the risk control module. And the efficency of Va R in risk quantitation based on a robust risk factor model and high performance implementation. The risk factor model characterizes the stochastic process for asset volatility, especially for identifying the autocorrelation,also know as the memory of the time series. The time range of autocorrelation for time series vary from stocks to bonds, which could be short time or long time. The short time or long time memory impact on risk model differs from the trading frequency, the daily trading to trading in seconds. Chinese stock markets are conducting T+1 trading rules, which the long time memory in time series would be more important in risk factor model building.In the thesis we analysis the long time memory of 355 stocks in ChiNext, China’s NASDAQ-style market, by using the Hurst exponent, estimated with the rescaled range. Nearly all of the 355 stocks in ChiNext show long time memory, and 87% of the stocks’ Hurst exponent belongs to the interval?0.66, 0.71?. With the aid of a robust risk model, then the investors need to be faster and quicker to action, loss lesser than the other competitors.Monte Carlo simulation is the most power tool to estimating VaR, but it’s a computing intensive application. We propose the CPU+MIC heterogenous High Performance Computing hardware platform to accelerate the Monte Carlo simulation.After a few steps of optimization, we get the program to be 9.12 times faster than the original single thread program.
Keywords/Search Tags:Value-at-Risk(VaR), Hurst exponent, Monte Carlo simulation, CPU+MIC heterogenous
PDF Full Text Request
Related items