Research On CBCT Three-dimensional Image Multi-slice Reconstruction

CBCT is one of the most popular techniques used in medical imaging field. CBCT can use the received projection data to reconstruct a cross-section of objects and it has the high scanning efficiency, high speed and high resolution advantages over traditional techniques. Katsevich algorithm, a popular CBCT exact reconstruction algorithm, which supports high image accuracy of reconstruction and enables exact images reconstruction, is arising people’s attention. However, due to the high complexity and large computation of Katsevich algorithm, problems about the hardware implementation for multi-slice fast imaging still need to be resolved.The dissertation firstly deduces parameter parsing equations of crossing line for cone beam and reconstruction slice based on cone-beam covering theory of Katsevich algorithm, and the cone beam is generated by different radiation sources. By the parametric equations, firstly the dissertation gets that different sources yield different coverage, and then the different degree of contribution for the reconstruction slice. Simultaneously, the dissertation can calculate the position information of rebuilt pixels of slices which are partially covered by ray source. At the same time, according to the symmetry of reconstruction slice, translation and rotation operations can be carried out by the original slice-ray source location information, to get the corresponding information for the new slice. So by the existing projection frame premise, multi-slice can be fast reconstructed, and finally by Matlab software and error analysis, the correctness of the method is verified.This dissertation designs hardware circuits for back-projection process of multi-slice reconstruction, and the whole circuit process is divided into different calculation module reasonably. Core argument parsing equation module is developed by high-efficiency pipeline CORDIC core and single-precision floating-point calculations core, and through comparing the generated data and the original software, the relative average error is controlled in 1.5%. Reconstruction slices that have maximum memory are stored in off-chip memory DDR3, DDR3 user logic is controlled by reading and writing state machine. Through the circuit functional simulation by Modelsim, the correctness of function is verified.After synthesis and board-level verification, results between hardware computing circuit and software-only are compared, and then error analysis reveals that the relative average error is less than 2%, verifying the accuracy of the calculation circuit. The circuit clock frequency reaches up to 125 MHz, so the speed increases an order of magnitude than software, which is important for the hardware studies of three-dimensional objects multi-slice reconstruction.