Simulation Analysis And Mechanism Research On Avalanche Capability Test Processof P-i-N Diode

Power fast recovery diode(FRD) always make an inverse parallel connection with full-controllable switch devices to constitutes a complete switch module and play a role of releasing energy during switching process in circuit and preventing dangerous overvoltage when inductive load circuit hard shut off. Thereby, diode always absorbs excessive energy and causes its damage. The diode’s avalanche capability will greatly influence the normal work and ruggedness of the whole circuit and system. Therefore, a thorough research on the avalanche capability issue of power diodes is very urgent.The avalanche capability evaluation of power devices are generally tested under the condition of the unclamped inductive load switching circuit. At present, there are nearly no literatures on avalanche capability of power FRD, nor reports of systematically investigations internationally. This paper focuses on the discussion and analysis of internal physical quantities’ development and mechanism of P-i-N diode during avalanche capability test process by the device simulation software and then tries to provide a basic physical understanding, basic data and a direction for avalanche capability improvement of FRD.A piecewise linear current source was used to imitate the pulse on P-i-N diode when the switch instantaneous turn off in UIS condition, and electro-thermal transient simulations were carried out by Sentaurus TCAD device simulation software. A reference diode whose static breakdown voltage is around 350 V and has a p+n-n+ structure with a plate termination was simulated by the energy of EAS=1.3mJ. It is observed that, during the test process the device mainly experienced 3 periods: overvoltage, negative differential resistance(NDR) and oscillation, and periodicity development. Since the beginning of NDR period, there was local avalanche injection both from p+n- junction and n-n+ junction, and current crowed occurred. The current filament is located in the junction edge which has a width of about 10 um and peak current density of 3.3×104A/cm2. Current filament can be observed which moves simultaneously with periodicity development of maximum temperature curve. That is while the filament stands at left or right end, the temperature rise rapidly by an average value of 80 K. And then the temperature decreases during the movement of the filament. The motion of filament due to the thermal effect of the current filament and negative temperature dependence of the impact ionization rates. By increasing the avalanche capability test energy, it was predicted that the possible failure location always occurs at the corner of pn junction, By adding a single floating field ring it was found that although the electric field concentration has moved to be on the edge of the ring, failure location is located in the main junction edge. The simulation prediction is consistent with experimental results. Finally, simulation of P-i-N diode on electrostatic discharge(ESD) was calculated to discuss the similarities and differences with avalanche capability test. These findings and other simulation results related would be of great significance to the follow-up research on improving avalanche capability and ESD immunity of FRD.