SOC Storage System High-level Modeling And DDR Controller With Memory Scheduling Strategy Research And Design

As the gap between the processor and memory performance growth rate increases gradually, the performance of storage system has the important influence on the SOC system, especially in the multimedia SOC.Study of SOC storage systems at present mainly concentrated in the DDR controller scheduling algorithm, is applied to study of scheduling algorithm and improved product, to effectively improve the SOC storage system properties, such as delay.This thesis will separately from the high-level modeling and scheduling algorithm two aspects discuss SOC storage subsystem optimization problem.The first part discusses SOC storage subsystem modeling,and high-level modeling using the open-source simulator DRAMSim2.DRAMSim2 is based on the source code to be modified to meet the needs of research.The polling scheduling algorithm of DRAMSim2 is improved based on the original priority scheduling strategy, forming the priority scheduling algorithm based on polling mechanism,.We also improve the original DRAMSim2 version which only supports fixed open page and close page strategy.The research achievements of this paper show the meaning of SOC high-level modeling in the study of high level of abstraction of SOC system performance optimization, and the high-level modeling for SOC system research reflects the real value. In addition, this paper optimizes DRAMSim2 version, which can deal with more complex SOC storage system research needs.