The Error Control Mechanism And Decoding Algorithm Of M-sequence And Their Implementation On A SDR Platform

An LDPC codes have a good performance while using the BP decoding algorithm. Because the limitations of LDPC codes in a very low code rate condition, the LDPC codes can’t work directly in a bad environment.Simplex code is the origin of using m-sequence as an error correcting code. As a recursive sequence, m-sequence has strong logical relationship between every bit, but a lot of information still lost in the process of decoding when using the hard decision. So, constructing LDPC codes with m-sequence and decoding with BP algorithm may be a good method to use the m-sequence as an error correcting code.About the truncated m-sequence codes, Zhe Zhang and Liang Zhou have presents the definition and basic check matrix of truncated m-sequence codes. But the decoding performance is not ideal. According to the nature of the primitive element, they extend the number of parity-check function in the basic check matrix. The extended check matrix improves the decoding performance.For the decoding algorithm above, the thesis analyzes the different decoding performance of bits in different location. This thesis explains that the bits in different location have different number of parity-check function, the more functions it has, the better decoding performance it has. This thesis put forward the decoding algorithm of truncated m-sequence codes which the information location is selected.For the phenomenon that different code rate leads to different decoding performance, this thesis gives the explanation that the lower bit rate, the more parity-check function it has. For a particular communication system, the sending end is impossible to randomly change the bit rate. So, only could the receiving end pretend it has received a lower bit rate code. Thus, extending code length decoding algorithm is proposed to improve decoding performance.At last, the thesis realizes the test of SNR on the SDR system and also gives the specific connection schematic diagram, the picture of real products and the function and interface of hardware. Then this thesis introduces the whole test process, and finally gives a concrete test results, including SNR estimation results, the waveform diagram of different hardware processing, the power spectrum and curve of error rate.