With the rapid development of Internet technology, the current 10 G Ethernet has been more and more popular. How can we allow the processor to quickly capture and process network packets, is still a hot topic of current research. In the FT(FT) platform, the traditional TCP / IP protocol stack to take up a large amount of computation and memory access resources, mainly in the interrupt context switching, protocol processing and data copying these three aspects. Although the domestic processor frequency although already from 800 HZ to 1000 HZ, but because the network bandwidth is much higher than the growth rate of the CPU processing capability, frequently CPU processing network transaction will have the following problems : a) receiving a large flow of data, the card will generate a lot of disruption, it will cause a lot of interrupt context switching overhead 2) frequent data copy( the first copy of the received packet to the kernel space, and then the application of data through the system call will again be copied to user space treatment) process also increases the system bus load and CPU processing cycles; 3) the traditional TCP / IP protocol data processing process is cumbersome, it consumes a lot of CPU power, CPU heavy network load causes severe overload, the system is easy to become IO bottlenecks.For current domestic processor ability is too low for large amount of network worload, in order to handle large data applications in high-speed network environment in order to avoid heavy TCP / IP protocol processing overhead caused by system-side bottlenecks, this paper introduces the TCP / IP protocol offload engine(TOE) technology, the TCP / IP protocol processing to be offloaded to the NIC in the protocol offload engine running, to reduce the CPU load when processing network IO, CPU can handle some critical real-time applications in a timely manner, thereby reducing application latency and improve the efficiency of the network processing.This paper studied the TOE technology-related principles and describes the TOE technology implementation strategies : partial offload and full offload. Then introduced the several strategy to fulfil TOE hardware : network processor reinforcement approach, ASIC(ASIC) chip mode and programmable device mode, and analyzes their advantages and disadvantages, from a cost and ease of implementation up decision in this paper, some of the unloaded TOE NIC hardware.Then introduced the domestic processors and data path offload strategy TOE NIC hardware functional logic, in view of the existing implementations on other platforms complex, poor application portability, for the partial offload TOE newworkcard, this paper proposes the embeded TOE-style software architecture, which in the original software stack based on the modification and function expansion, and soar based platform designed FT-TOE system software, the paper in the domestic soar platform designed and implemented the FT-TOE system software architecture relatively simple to achieve more convenient, including unloading modules and TOE TOE device driver modules, and will be a strong correlation between the device protocol processing function code is mostly transferred to the TOE NIC driver to achieve, but also for Kyoin-OS minor changes to the network protocol stack.Then the realization of FT-TOE system uses the connection offload technology, efficient packet transport mechanism, the interrupt plus polling receive packets(NAPI) and other key technologies and meticulous research, followed by the conduct of the protocol process involved in the other two important overhead : Interrupt handling switching overhead and data copying are analyzed and optimization. First from interrupt processing from the system point of view, combined with multi-core processor hardware features FT proposed static interrupt load balancing method is used to improve the performance of the system interrupt load, this static interrupt load balancing scheduling can significantly balanced NIC interrupt loads. Then the data is processed in the process of the kernel buffer to the user buffer is a copy of the buffer for further optimization, the FT-TOE software to achieve zero copy data transmission technology.Finally, the FT-TOE system prototype implementation and performance testing, and then were on multi-core processors based on domestic soar interrupt scheduling and load balancing technology for zero-copy performance test showed that after the interrupt load balancing scheduling and optimization of zero-copy technology after made to maximize the reduction of FT CPU protocol processing overhead data copying overhead and interrupt handling and context switching overhead, improved data transmission and processing efficiency. Respectively, then CPU utilization and network throughput as an indicator for the FT-TOE system to do network performance testing and analysis. Test results showed that: You can use the TOE offload engine FT CPU protocol processing from heavy freed and CPU usage can be reduced about 50% in comparion with NonTOE. |